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BACKPORT: arm64: Get rid of asm/opcodes.h
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The opcodes.h drags in a lot of definition from the 32bit port, most
of which is not required at all. Clean things up a bit by moving
the bare minimum of what is required next to the actual users,
and drop the include file.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Change-Id: Idc1568eaf85077c03d22bd8e070474dfe271a7d8
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Marc Zyngier authored and MocaRafee committed Nov 8, 2024
1 parent fb0f8fc commit 79e0b67
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Showing 4 changed files with 14 additions and 13 deletions.
5 changes: 0 additions & 5 deletions arch/arm64/include/asm/opcodes.h

This file was deleted.

16 changes: 10 additions & 6 deletions arch/arm64/include/asm/sysreg.h
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Expand Up @@ -22,8 +22,6 @@

#include <linux/stringify.h>

#include <asm/opcodes.h>

/*
* ARMv8 ARM reserves the following encoding for system registers:
* (Ref: ARMv8 ARM, Section: "System instruction class encoding overview",
Expand All @@ -37,6 +35,12 @@
#define sys_reg(op0, op1, crn, crm, op2) \
((((op0)&3)<<19)|((op1)<<16)|((crn)<<12)|((crm)<<8)|((op2)<<5))

#ifdef __ASSEMBLY__
#define __emit_inst(x) .inst (x)
#else
#define __emit_inst(x) ".inst " __stringify((x)) "\n\t"
#endif

#define SYS_MIDR_EL1 sys_reg(3, 0, 0, 0, 0)
#define SYS_MPIDR_EL1 sys_reg(3, 0, 0, 0, 5)
#define SYS_REVIDR_EL1 sys_reg(3, 0, 0, 0, 6)
Expand Down Expand Up @@ -81,10 +85,10 @@
#define REG_PSTATE_PAN_IMM sys_reg(0, 0, 4, 0, 4)
#define REG_PSTATE_UAO_IMM sys_reg(0, 0, 4, 0, 3)

#define SET_PSTATE_PAN(x) __inst_arm(0xd5000000 | REG_PSTATE_PAN_IMM |\
(!!x)<<8 | 0x1f)
#define SET_PSTATE_UAO(x) __inst_arm(0xd5000000 | REG_PSTATE_UAO_IMM |\
(!!x)<<8 | 0x1f)
#define SET_PSTATE_PAN(x) __emit_inst(0xd5000000 | REG_PSTATE_PAN_IMM | \
(!!x)<<8 | 0x1f)
#define SET_PSTATE_UAO(x) __emit_inst(0xd5000000 | REG_PSTATE_UAO_IMM | \
(!!x)<<8 | 0x1f)

/* Common SCTLR_ELx flags. */
#define SCTLR_ELx_EE (1 << 25)
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5 changes: 4 additions & 1 deletion arch/arm64/kernel/armv8_deprecated.c
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Expand Up @@ -16,7 +16,6 @@

#include <asm/cpufeature.h>
#include <asm/insn.h>
#include <asm/opcodes.h>
#include <asm/sysreg.h>
#include <asm/system_misc.h>
#include <asm/traps.h>
Expand Down Expand Up @@ -366,6 +365,10 @@ static int emulate_swpX(unsigned int address, unsigned int *data,
return res;
}

#define ARM_OPCODE_CONDTEST_FAIL 0
#define ARM_OPCODE_CONDTEST_PASS 1
#define ARM_OPCODE_CONDTEST_UNCOND 2

#define ARM_OPCODE_CONDITION_UNCOND 0xf

static unsigned int __kprobes aarch32_check_condition(u32 opcode, u32 psr)
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1 change: 0 additions & 1 deletion arch/arm64/kernel/insn.c
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Expand Up @@ -30,7 +30,6 @@
#include <asm/cacheflush.h>
#include <asm/debug-monitors.h>
#include <asm/fixmap.h>
#include <asm/opcodes.h>
#include <asm/insn.h>

#define AARCH64_INSN_SF_BIT BIT(31)
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