Weird console on alternate UART port

[dat-tran-matternet]

Hi am currently working with the latest module, Jetson TX2 NX (aka Lanai). It fits in a Xavier NX carrier board using the yocto MACHINE name "jetson-xavier-nx-devkit-tx2-nx". I am able to connect to the debug UART port to get linux console access. I need to use another UART port for connecting to an STM32 mcu. Using UART1 from the 40pin expansion header, I am seeing something really weird (see below). Has anyone seen this?

Here are the serial ports I currently see in /dev. Not sure why I see so many since the TX2 NX only supports 3 UARTs:

crw------- 1 root tty       4,  64 Apr  2 16:30 ttyS0
crw-rw---- 1 root dialout   4,  65 Apr  2 16:22 ttyS1
crw-rw---- 1 root dialout   4,  66 Apr  2 16:22 ttyS2
crw-rw---- 1 root dialout   4,  67 Apr  2 16:22 ttyS3
crw-rw---- 1 root dialout   4, 143 Apr  2 16:22 ttyTCU0
crw-rw---- 1 root dialout 238,   1 Apr  2 16:22 ttyTHS1
crw-rw---- 1 root dialout 238,   3 Apr  2 16:22 ttyTHS3

Here is the weird output using the UART1 pins of the expansion header:

welcome to lk
adc initialized
chip_revision initialized
speedo initialized
dt initialized
clk_init_mrq: mrq handler registered
383 clocks registered
clock initialized
reset initialized
i2c5 controller initialized
i2c10 controller initialized
initialized i2c mrq handling
i2c initialized
thermal initialized
fuse initialized
soctherm initialized
aotag initialized
cvc initialized
regulator initialized
dvs initialized
t186_dvs initialized
pm initialized
tegra186_reset initialized
uart initialized
sku_init: not sku 00
sku initialized
modules initialized
tag initialized
avfs_clk_platform initialized
parse_possible_parent_table: pllp_bb not in allowed parent table for axi_cbb
clock_dt initialized
powergate initialized
avfs_gpu initialized
clock_gpu initialized
debugfs_mrq initialized
emc initialized
gpmu2bpmp initialized
mc_init_mrq: mrq handler registered
mc initialized
pg_mrq initialized
pg_legacy_mrq initialized
pm_post initialized
ppm initialized
uphy_dt initialized
uphy initialized
mrq initialized
tag is 91572a54614f84d0fd0c270beec2c56f
tag_lateinit initialized
clock_debugfs initialized
thermal_test    Nitialized
                          avfs_clk_platform_pocT inh4ialized
avfs_debugfs initialized
clock_pto in)tialized
cvc_dt initialized
debugfs_cons_init initialized
dvs_debugfs initialized
rm initialized
edp initialized
gboost initialized
powergate_debug initialized
regulator_post initialized
sku_debugfs initialized
speedo_debugfs initialized
soctherm_debug initialized
aotag_hsm initialized
sc7_diag initialized
starting app shell
entering main console loop
] WARNING: at platform/drivers/clk/clk-mrq.c:290

] help
command list:
        try_dw          : display memory in words. Skip data aborts
        tests           : invoke tests
        ping            : ping mail target
        i2cw            : write byte to PWR_I2C
        i2cr            : read byte from PWR_I2C
        display_dt      : display DT
        chipid          : display chipid info
        tag             : show tag
        dw              : display memory in words
        dh              : display memory in halfwords
        db              : display memory in bytes
        mw              : modify word of memory
        mh              : modify halfword of memory
        mb              : modify byte of memory
        fw              : fill range of memory by word
        fh              : fill range of memory by halfword
        fb              : fill range of memory by byte
        mc              : copy a range of memory
        cc              : clean cache for a range of memory
        ci              : invalidate cache for a range of memory
        cf              : clean and invalidate (flush) cache for a range of memory
        fc              : clean and invalidate (flush) whole data cache
        td              : trace dump
        help            : this list
        debugfs         : debugfs commands
        threads         : list kernel threads
        threadstats     : thread level statistics
        threadload      : toggle thread load display

[madisongh]

That looks like it might be the BPMP console. Check the NVIDIA forums on how to disable that... IIRC, there's change to the BPMP device tree you have to make to disable it.

[kekiefer]

Moreover, you might take a look at patching tegra186-mb1-bct-misc-si-l4t.cfg (for this platform) to change the debug.uart_instance port. This "should" redirect all the TCU0 (combined uart) output. I've personally only changed the MB1/MB2 configurations to change the log verbosity, and on a different platform, so there might be more to it than this.

[kekiefer]

After reading your request again I see that you're not interested in changing the uart console -- you're trying to figure out why this alternate uart has spew on it. So nevermind :P but I'll leave this here in case it's useful to anyone.

[dat-tran-matternet]

Thanks for your help. I need to use another UART port to communicate to an STM32 mcu. Instead of just disabling this UART on the BPMP, I will have to change the pinmux as well right. I don't want it connected to the BPMP assuming that's a coprocessor. I would like to connect it to the main processor (ie TX2). Is my understanding/approach correct?

[madisongh]

I looked at the pinmux spreadsheet for the TX2-NX module, and it doesn't look like any changes are needed. Just disabling the BPMP's hijacking of the UART should be enough.

[dat-tran-matternet]

Awesome. Thanks for checking!

Both UART peripherals must have been driving the line since I see garage characters sometimes.

[dat-tran-matternet]

Seems to be working. Thanks for all your help guys!