libmetal/nuttx/io.c: width matched access when read/write size = 1,2,4,8 #279
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If constraint is generic what about using macros metal_io_write/read ( x = 8,16,32 or 64) in open-amp? |
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@arnopo Yes, we used libmetal implemented |
Thanks for the link! Something seems missing in you patch. You should check the alignement of the address to respect the virtio specification |
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This pull request has been marked as a stale pull request because it has been open (more than) 45 days with no activity. |
Follow the virtio spec v1.2: The driver MUST only use 32 bit wide and aligned reads and writes to access the control registers described in table 4.1. For the device-specific configuration space, the driver MUST use 8 bit wide accesses for 8 bit wide fields, 16 bit wide and aligned accesses for 16 bit wide fields and 32 bit wide and aligned accesses for 32 and 64 bit wide fields. Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com> Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
@arnopo How about leaving virtio devices and drivers to ensure that the address is aligned? |
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@arnopo And could you check why the CI failed, seems not related to this PR? |
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yes that can make sense a part of the spec. And checking only the MMIO register base address should ensure the alignement. |
| *(uint32_t *)dst = *(uint32_t *)va; | ||
| else if (len == 8) { | ||
| *(uint32_t *)dst = *(uint32_t *)va; | ||
| *((uint32_t *)dst + 1) = *((uint32_t *)va + 1); |
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what about using uint64_t ?
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The spec says:
The driver MUST use 8 bit wide accesses for 8 bit wide fields, 16 bit wide and aligned accesses for 16 bit wide fields and 32 bit wide and aligned accesses for 32 and 64 bit wide fields.
libmetal/nuttx/io.c: width matched access when read/write size = 1,2,4,8
Follow the virtio spec v1.2
So change the nuttx implemented io read/write operation.