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Full support for Sainsmart DDS120 #69
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There are two possibilities to get offset and gain calibration values:
I suspect that the DDS120 firmware does not support the reading of EEPROM content, so reading of calibration values failed and uninitialised memory content was used. |
If it is using the sigrok opensource firmware then this is what they implemented |
there is also some additional information but about the vendor firmware that you might already know, but just in case it might be useful here |
OpenHantek6022 tries to read calibration data from the EEPROM and as the sigrok firmware for DDS120 does not support EEPROM reading it fails and informs you about this, but this is an info/warning message and not an error. Also as the DDS120 has own firmware in EEPROM (in this case a so called big EEPROM (capacity > 256 Byte with different 16 bit addressing mode compared to the small Hantek EEPROMs capacity <= 256 Byte, 8 bit addressing). Therefore it is not possible to store calibration values in EEPROM in a consistent way and without destroying the original firmware. Some more details:
Root cause of #69 was that there was no valid *.conf available so the values from step 2 should be used. As the reading from EEPROM failed the (unpopulated) calibration structure
I checked the sigrok firmware that your scope uses and this FW doesn't support the EEPROM. So you must use the config file to compensate offset and gain error and live with this (not critical) info message. |
I installed Hantek6022API-2.06 and made small modifications to be able to run calibrate_6022.py (attached file), as the reading of EEPROM is not supported, first I run openhantek to load the open source firmware and then patched and run the python tool. The offsets look fine, however, the gains computed with the tool don't work well in my case (maybe because it is not for DDS120), e.g.
whereas if I compute the corrections manually (taking the DC average from the gui) I get better results, e.g.
Without the corrections, the error is relatively small for high voltages (<5%) but it could be as large as 15% for lower voltage ranges (20-50mV), in any case, it works quite well, thanks a lot! |
Hi, thx for providing this info. The observed discrepancy between the automatic gain and your manual gain is caused by the different analog front end hardware of the 120 compared to the 6022.
... and
while the 120 uses five different gain steps (20/20/10/5/2/1/1/1)
These lines should be fixed:
The firmware flashing can also be incorporated in your modified
|
Hi, I replaced lines L122-125 with
and L215 with
but still I'm getting similar results, maybe there are some more parameters specific of DDS120 that are in OpenHantek but not in the Hantek6022API-2.06 that are needed for reading or correctly setting the parameters of DDS120 with the python tool, in any case, the manual config works very well |
You must adapt the values in line 215 to your settings according |
I changed line 215 with
and now it gives similar values to the manual calibration, e.g.
except for 20mV and 50mV where sometimes it gives no value or the values are too large. Comparing with the value obtained manually, 1.60 should be around 0.77. The file calibrate_dds120.txt contains the modifications of calibrate.py script except the part of the firmware loading. |
Alternatively, this is how I obtained the correction values "manually":
|
The 1.60 value must be of course half as big (0.77 looks good), because 6022 has gain=10 and 120 has gain=20 in the two lowest ranges:
BTW: did you check the latest pre-release? I made some improvements for the calibration output especially for the 120 (now you can select 100Hz, 1kHz, 10kHz and 50kHz, this is all the sigrok FW delivers). Also the marker handling got two new features: double click (left mouse button) draws two nearby markers that will give zoom=100, while right double click moves the markers out of the way to left and right margin. |
ok, very good, this explains why it didn't work and the value 0.77 ~ 0.80 = 64/40/2 = 160/100/2 (so maybe 0.80 should go in the script). This fixes the issue, the changes could be integrated in your script with an additional command line parameter, e.g. --model DDS120 (default: Hantek6022) or else with the modifications from here or else with the manual calibration :)
I have just compiled and noticed that the calibration out frequency is twice the value reported by the scope, this can be seen in any of the two screenshots above, i.e. calibration out 1kHz, scope 500 Hz, is this the expected behaviour? for all the calibration frequencies the value reported by the scope is half (and less than 2V pp) |
The voltage ist hardwired and fixed, the frequency is a bug in the sigrok firmware. I know what to change and will file an issue report/pull request. |
ok, thanks a lot! |
Rebuilt the patched sigrok fw from https://github.com/sigrokproject/sigrok-firmware-fx2lafw. |
I don't see a reason for this 50kHz/25kHz behaviour, did you measure the 50/25 thing at the same timebase setting as e.g. the 10kHz?
My own 6022 firmware runs @ 48MHz to allow 100kHz (IIRC 200kHz didn't work). So I will roll another FW, please try 0e50d59... |
sigrok doesn't use an individual PID for different HW like Hantek, Sainsmart etc., but uses the USB version ID to differentiate the devices. These are the relevant parts of the descriptor source files for the supported scope devices:
But as I already incorporate the firmware hex files into OH, maybe I'll switch to my versioning scheme with 04B5/0120 and VER counting up with API changes. This will give me more speed and flexibility, e.g. to add more calibration frequencies like 50,60,100,200,500,1000,2000...100000 Hz. |
So - 1st try with own DDS120 FW: 0e8583f |
I need your input to track this issue down: 1.) Does it also happen with the config file in place? If not, the issue is caused by using the factory firmware in EEPROM as calibration data. 2.) If yes, does it also look the same with sample rate 30 MS/s (CH1 only)? 30 MS/s gets its sample clock directly from the 30MHz IFCLK output of the EzUSB, while the lower frequencies are created from the GPIF subsystem and coming from CTL2 output. As I do not have schematics at hand I have to rely on the sigrok source. |
it does with and without
it cannot be changed to 30MS/s only up to 5MS/s and it does look the same in all samplerates. There is some information compilation about the DDS120 in the sigrok wiki with some pictures of the pcb that might help. |
Yes, I read the long EEVBLOG thread and found out that the timing is created differently in comparison with Hantek and I cannot use a common source code base for both scopes. So I decided to switch back to the sigrok FW, only with small improvements for the calibration output frequency; it provides 50, 60, 100, 200, 500, 1000, 2000, 5000, 10000 and 20000 Hz. To distinguish from the original sigrok I'll stay with the OpenHantek VID 0x04B5 and define PID 0x0120, but use the FW version 1.00 instead of the 2.06 version of Hantek. -> 476b78d |
If there is no significant improvement it might not have much sense to rewrite the sigrok firmware, you did a lot of work and the scope is working very well with the latest commit including all calibration frequencies (50Hz-20kHz), it could be used as a small frequency generator and it only needs a config file if you need a precision much less than 5% for voltage ranges > 50 mV, thanks a lot! |
I gave it another try with commit b2c5492 and I was able to change to 30MS/s by changing the timebase and the scope does not behave the same as you already pointed out :) With the updated sigrok firmware I overlooked one of the calibration frequencies, 60Hz -> 75Hz, please see attached screenshot, all low frequencies show the same characteristic shape. |
ok, one wrong value slipped in, fixed with be8142a
The sloping roof comes from the time constant of the AC filter, if you switch to DC you'll see the horizontal roof. Even if your corner frequency is very low compared with the signal frequency you'll see some percent signal drop (because the constant flat roof has frequency 0 Hz). Note to myself: DDS120 ADC timing is different than 6022. 6022: ADC is clocked from IFCLK @30MS/s (and @48MS/s), but at lower sample rates the slower clock comes from CTL2 (6022BE) or CTL0 (6022BL) in sync with the GPIF DATA bit (OPCODE.1).
DDS120: ADC is always clocked from IFCLK @30MS/s or @48MS/s, only the DATA bit is slowed down to the sample rate.
|
very good, I have just tested it and it works very well, thanks a lot! |
It was mentioned here that a firmware can be loaded on the DDS120 to fix the wrong halfed value (test-signal of the dds129 device is 1khz but however 500Hz are determined). How can I flash this firmware dds120-firmware.hex to the device? I find almost no helpful information about it. |
The correct FW is automatically uploaded to the device when you start OpenHantek6022. Even when this is called "flashed" the FW is not written into flash - the CY7C68013A does not have user programmable flash memory, the FW is uploaded into device RAM, this has to be done every time you power the device on. So it doesn't make sense to do it on your own unless you're doing FW development. |
Ah ok, then I understand it so that the own dds120 firmware (which I had found in that folder) is uploaded at startup of open hantek. The question is, why does openhantek show me the test signal (supposedly 1khz) only at 500Hz as a whole pulse only? as seen above in the first screen of the OP. |
Please post a screenshot of the main screen as well as from the about screen. |
By the way: it is only related to the test signal or calibration signal of the DDS120, which is specified/documented in the specs with 1kHz, but shows 500Hz only in the OH. Other measurements of any kind give/show correct values with that device - only this specific test signal is not 1kHz. Is this a wrong description of Sainsmart in their specs and the real test signal is only ejected in 500Hz? |
I'll have a look at your issue when I'm back home next week. It's always difficult for me to handle these "exotic" devices that I don't own - I have to debug virtually by looking at the FW source code. But nevertheless I think it can be solved. |
i thought it was already fixed here: However, it only affects the test signal (i.e. the internal test generator of DDS120). It may well be that DDS120 simply spits out a 500Hz signal only and the docs are wrong about it. Everything else works correctly (including the measurement of things displayed in the correct range of values). So I'm going to assume that this issue is just a minor thing. |
This is a known bug of the sigrok FW, I issued a patch that was never applied, iirc. |
Question - why is @rio-rattenrudel's device recognised as MDSO? |
maybe it is a MDSO oscilloscope |
could you take the same picture without running openhantek? you need to close openhantenk, unplug the oscilloscope, connect the oscilloscope again and then take the picture |
then there might be a problem with openhantek in windows for not to load the patched firmware FW0100, firmware FW0002 won't work, @Ho-Ro fixed the problem in firmware FW0100 |
BTW: nice GUI of OH and how it has evolved over the years. |
And it's quite a minor issue. It only affects the test signal. Fortunately, not the actual measurements. |
There is an offset between the vertical position of the trace and the channel marking CH1 in DDS120, please see screenshot, this might be related or be the same as bug #39 but it is already closed.
I would expect that the channel marking would be at the base of the trace as in the images shown in the readme.
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