timing(IMSIC): AXI4 output should be buffered (#3757)

src/main/scala/device/imsic_axi_top.scala

@@ -146,7 +146,7 @@ class imsic_bus_top(
     )))
     val xbar = AXI4Xbar(TLArbiter.lowestIndexFirst)
     axi4nodes.foreach { _ := xbar }
-    xbar := node
+    xbar := AXI4Buffer() := node
     node
   }