This crate contains some tuned DSP algorithms for general and especially embedded use. Many of the algorithms are implemented on integer datatypes for reasons that become important in certain cases:
- Speed: even with a hard floating point unit integer operations are faster.
- Accuracy: single precision FP has a 24 bit mantissa,
i32has full 32 bit. - No rounding errors.
- Natural wrap around (modulo) at the integer overflow: critical for phase/frequency applications.
- Natural definition of "full scale".
One comprehensive user for these algorithms is Stabilizer.
This uses a small (128 element or 512 byte) LUT, smart octant (un)mapping, linear interpolation and comprehensive analysis of corner cases to achieve a very clean signal (4e-6 RMS error, 9e-6 max error, 108 dB SNR typ), low spurs, and no bias with about 40 cortex-m instruction per call. It computes both cosine and sine (i.e. the complex signal) at once given a phase input.
This returns a phase given a complex signal (a pair of in-phase/x/cosine and quadrature/y/sine). The RMS phase error is less than 5e-6 rad, max error is less than 1.2e-5 rad, i.e. 20.5 bit RMS, 19.1 bit max accuracy. The bias is minimal.
An extension trait for the num::Complex type featuring especially a std-like API to the two functions above.
High accuracy, zero-assumption, fully robust, forward and reciprocal PLLs with dynamically adjustable time constant and arbitrary (in the Nyquist sampling sense) capture range.
Tools to handle, track, and unwrap phase signals or generate them.
i32 and f32 biquad IIR filters with robust and clean clipping and offset (anti-windup, no derivative kick, dynamically adjustable gains).
Fast, infinitely cascadable, first-order lowpass and the corresponding integration into a lockin amplifier algorithm.