Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Fix possibility of falsy zero for work_wires in templates #6720

Merged
merged 22 commits into from
Dec 16, 2024

Conversation

andrijapau
Copy link
Contributor

@andrijapau andrijapau commented Dec 13, 2024

Context:

Follow up to #6713.

Previously, work_wires=0 was incorrectly being mapped to an empty list,

>>> qml.Adder(1, x_wires=(), mod=1, work_wires=0)
TypeError: object of type 'int' has no len()

Now, we have it properly handled,

>>> qml.Adder(1, x_wires=(), mod=1, work_wires=0)
Adder(wires=[0])
>>> qml.Adder(1, x_wires=(), mod=1, work_wires=None)
ValueError: Adder: wrong number of wires. At least one wire has to be given.

Description of the Change:

Source Code

Change the faulty logic of work_wires = work_wires or () which will fail if work_wires=0.

Test Suite

Added tests to templates that allow single work wires, ensuring work_wires=0 can be passed.

Benefits: Fixes possibility of falsy zero logic in work_wires.

Possible Drawbacks: None.

[sc-80454]

@andrijapau andrijapau requested a review from albi3ro December 13, 2024 18:50
Copy link
Contributor

@albi3ro albi3ro left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I'm wondering if these are worth tests to prevent this mistake from happening again?

@andrijapau andrijapau changed the title Fix possibility of falsy zero logic for work_wires in qml.templates.subroutines Fix possibility of falsy zero logic for wires in qml.templates.subroutines Dec 13, 2024
Copy link

codecov bot commented Dec 13, 2024

Codecov Report

All modified and coverable lines are covered by tests ✅

Project coverage is 99.62%. Comparing base (cffa08a) to head (90e820c).
Report is 2 commits behind head on master.

Additional details and impacted files
@@            Coverage Diff             @@
##           master    #6720      +/-   ##
==========================================
- Coverage   99.62%   99.62%   -0.01%     
==========================================
  Files         476      476              
  Lines       44740    44733       -7     
==========================================
- Hits        44571    44564       -7     
  Misses        169      169              

☔ View full report in Codecov by Sentry.
📢 Have feedback on the report? Share it here.

@andrijapau andrijapau changed the title Fix possibility of falsy zero logic for wires in qml.templates.subroutines Fix possibility of falsy zero logic for work_wires in qml.templates.subroutines Dec 16, 2024
@andrijapau andrijapau changed the title Fix possibility of falsy zero logic for work_wires in qml.templates.subroutines Fix possibility of falsy zero logic for work_wires in templates Dec 16, 2024
pennylane/templates/subroutines/adder.py Outdated Show resolved Hide resolved
pennylane/templates/subroutines/mod_exp.py Outdated Show resolved Hide resolved
pennylane/templates/subroutines/multiplier.py Outdated Show resolved Hide resolved
pennylane/templates/subroutines/out_adder.py Outdated Show resolved Hide resolved
pennylane/templates/subroutines/out_multiplier.py Outdated Show resolved Hide resolved
pennylane/templates/subroutines/out_poly.py Outdated Show resolved Hide resolved
pennylane/templates/subroutines/phase_adder.py Outdated Show resolved Hide resolved
pennylane/templates/subroutines/qrom.py Outdated Show resolved Hide resolved
andrijapau and others added 4 commits December 16, 2024 14:13
Co-authored-by: Mudit Pandey <mudit.pandey@xanadu.ai>
Co-authored-by: Mudit Pandey <mudit.pandey@xanadu.ai>
Co-authored-by: Mudit Pandey <mudit.pandey@xanadu.ai>
Co-authored-by: Mudit Pandey <mudit.pandey@xanadu.ai>
andrijapau and others added 5 commits December 16, 2024 14:14
Co-authored-by: Mudit Pandey <mudit.pandey@xanadu.ai>
Co-authored-by: Mudit Pandey <mudit.pandey@xanadu.ai>
Co-authored-by: Mudit Pandey <mudit.pandey@xanadu.ai>
Co-authored-by: Mudit Pandey <mudit.pandey@xanadu.ai>
@andrijapau andrijapau requested a review from mudit2812 December 16, 2024 19:17
Copy link
Contributor

@lillian542 lillian542 left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM!

Copy link
Contributor

@KetpuntoG KetpuntoG left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

🙌

@andrijapau andrijapau enabled auto-merge (squash) December 16, 2024 21:33
@andrijapau andrijapau changed the title Fix possibility of falsy zero logic for work_wires in templates Fix possibility of falsy zero for work_wires in templates Dec 16, 2024
@andrijapau andrijapau merged commit 579e70d into master Dec 16, 2024
46 checks passed
@andrijapau andrijapau deleted the fix-falsy-zero branch December 16, 2024 21:59
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

5 participants