…is based on Dockerfile for NVIDIA GPU.

     1. replace __shfl_down_sync(0xffffffff, ...) with __shfl_down(...)
                __shfl_xor_sync(0xffffffff,...) with __shfl_xor(...)
        for AMD ROCm HIP
     2. replace dim3 integer vector initialization { , , } with dim3( , , )
        for AMD ROCm HIP

for more information, see https://pre-commit.ci

I, Yaoming Mu <yaoming.mu@amd.com>, hereby add my Signed-off-by to this commit: 018609c
I, Yaoming Mu <yaoming.mu@amd.com>, hereby add my Signed-off-by to this commit: a8cfcf6

As discussed with MONAI team, moves DOckerfile.amd from this PR. The existing file "Dockerfile" will be refactored to allow build images for different GPUs.

Signed-off-by: Yaoming Mu <yaoming.mu@amd.com>

…duce the amount of codes. Currently AMD HIP does not support __shfl_xxx_sync functions as NVIDIA CUDA, but when mask is 0xffffffff, __shfl_xxx_sync would be replaced by __shfl_xxx for the codes in gmm_cuda.cu

run unittest tests/test_gmm.py for NVIDIA and AMD GPUs and tests passed.

Signed-off-by: Yaoming Mu <yaoming.mu@amd.com>

Signed-off-by: monai-bot <monai.miccai2019@gmail.com>