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@PyFive-RISC-V

PyFive-RISC-V

PyFive - RISC-V libre silicon microcontroller design leveraging the new Google/SkyWater 130nm PDK

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  1. pyfive_top_202011 pyfive_top_202011 Public

    Top level for the November shuttle

    Verilog 11 2

  2. caravel_pyfive caravel_pyfive Public

    Forked from efabless/caravel_mpw-one

    Verilog 8 2

  3. pyfive pyfive Public

    PyFive - RISC-V libre silicon microcontroller design leveraging the new Google/SkyWater 130nm PDK

    7 1

  4. pyfive_no2usb pyfive_no2usb Public

    OpenLane design for the no2usb core

    Python 4

  5. circuitpython circuitpython Public

    Forked from adafruit/circuitpython

    CircuitPython - a Python implementation for teaching coding with microcontrollers

    C 3

  6. pyfive-mpw1-pcb pyfive-mpw1-pcb Public

    Breakout carrier for the MPW1 PyFive chip

    3 2

Repositories

Showing 10 of 15 repositories
  • pyfive-mpw1-postmortem Public
    PyFive-RISC-V/pyfive-mpw1-postmortem’s past year of commit activity
    Assembly 2 MIT 3 3 0 Updated Aug 16, 2022
  • openlane-baremetal Public Forked from smunaut/openlane-baremetal
    PyFive-RISC-V/openlane-baremetal’s past year of commit activity
    Shell 0 3 0 0 Updated Dec 30, 2021
  • pyfive_top_202011 Public

    Top level for the November shuttle

    PyFive-RISC-V/pyfive_top_202011’s past year of commit activity
    Verilog 11 2 0 0 Updated Nov 20, 2021
  • pyfive-mpw1-pcb Public

    Breakout carrier for the MPW1 PyFive chip

    PyFive-RISC-V/pyfive-mpw1-pcb’s past year of commit activity
    3 MIT 2 7 1 Updated Sep 29, 2021
  • pyfive-spi Public

    SPI peripheral for Pyfive

    PyFive-RISC-V/pyfive-spi’s past year of commit activity
    3 MIT 0 0 0 Updated Sep 15, 2021
  • pyfive-risc-v.github.io Public Forked from Appdynamics/jekyll-rtd-theme

    Pyfive Docs

    PyFive-RISC-V/pyfive-risc-v.github.io’s past year of commit activity
    SCSS 0 MIT 424 1 0 Updated Sep 8, 2021
  • circuitpython Public Forked from adafruit/circuitpython

    CircuitPython - a Python implementation for teaching coding with microcontrollers

    PyFive-RISC-V/circuitpython’s past year of commit activity
    C 3 MIT 7,997 0 0 Updated Jul 9, 2021
  • caravel_pyfive Public Forked from efabless/caravel_mpw-one
    PyFive-RISC-V/caravel_pyfive’s past year of commit activity
    Verilog 8 Apache-2.0 138 0 0 Updated Dec 20, 2020
  • pyfive_no2usb Public

    OpenLane design for the no2usb core

    PyFive-RISC-V/pyfive_no2usb’s past year of commit activity
    Python 4 0 0 0 Updated Nov 20, 2020
  • openlane Public Forked from The-OpenROAD-Project/OpenLane

    OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.

    PyFive-RISC-V/openlane’s past year of commit activity
    Verilog 1 Apache-2.0 391 0 0 Updated Jul 31, 2020
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