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Sources of the firmware running on the Xilinx FPGA used in the IonControl project

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GPL-3.0 and 2 other licenses found

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GPL-3.0
LICENSE
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license.txt
GPL-3.0
COPYING.txt
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QITI/IonControl-firmware

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5 Commits
Core
Core
 
 
MIG
MIG
 
 
ipcore_dir
ipcore_dir
 
 
iseconfig
iseconfig
 
 
noasic
noasic
 
 
.gitignore
.gitignore
 
 
AD9910.v
AD9910.v
 
 
AD9912.v
AD9912.v
 
 
AD9912_tb.v
AD9912_tb.v
 
 
ADC122S101.v
ADC122S101.v
 
 
ADCControl.v
ADCControl.v
 
 
ADCControl_tb.v
ADCControl_tb.v
 
 
ADCReaderAD7608.v
ADCReaderAD7608.v
 
 
ADCReaderAD7608_tb.v
ADCReaderAD7608_tb.v
 
 
ADCReaderBoardV1.v
ADCReaderBoardV1.v
 
 
ADCReaderBoardV1_tb.v
ADCReaderBoardV1_tb.v
 
 
AsyncReceiver.v
AsyncReceiver.v
 
 
AsyncTransmitter.v
AsyncTransmitter.v
 
 
AsyncTransmitter_tb.v
AsyncTransmitter_tb.v
 
 
AutoLock.v
AutoLock.v
 
 
AutoLock_tb.v
AutoLock_tb.v
 
 
COPYING.txt
COPYING.txt
 
 
Configuration.v
Configuration.v
 
 
DAC8568.v
DAC8568.v
 
 
DAC8568Bitbang.v
DAC8568Bitbang.v
 
 
DAC8568_tb.v
DAC8568_tb.v
 
 
DedicatedCounterADC.v
DedicatedCounterADC.v
 
 
DedicatedCounterADC_tb.v
DedicatedCounterADC_tb.v
 
 
ExtendedWireBuffer.v
ExtendedWireBuffer.v
 
 
ExtendedWireToParallel.v
ExtendedWireToParallel.v
 
 
ExtendedWireToParallel_tb.v
ExtendedWireToParallel_tb.v
 
 
FPGAfirmware.v
FPGAfirmware.v
 
 
FPGAfirmware_summary.html
FPGAfirmware_summary.html
 
 
FifoMultiplexer.v
FifoMultiplexer.v
 
 
LFSR.v
LFSR.v
 
 
LICENSE
LICENSE
 
 
MP9910.v
MP9910.v
 
 
MQCO-Pulser-Fimware.xise
MQCO-Pulser-Fimware.xise
 
 
MultAccum_limited.v
MultAccum_limited.v
 
 
MultAccum_tb.v
MultAccum_tb.v
 
 
MultAdd_tb.v
MultAdd_tb.v
 
 
PulseProgrammer.v
PulseProgrammer.v
 
 
README.md
README.md
 
 
RamInterface.v
RamInterface.v
 
 
RamInterface_tb.v
RamInterface_tb.v
 
 
ScanGenerator.v
ScanGenerator.v
 
 
ScanGenerator_tb.v
ScanGenerator_tb.v
 
 
SignalSelect.v
SignalSelect.v
 
 
TFIFO64x8a_64x8b.ngc
TFIFO64x8a_64x8b.ngc
 
 
TimimgExceptions.ucf
TimimgExceptions.ucf
 
 
VarScanGenerator.v
VarScanGenerator.v
 
 
adc_wrapper.v
adc_wrapper.v
 
 
adc_wrapper_tb.v
adc_wrapper_tb.v
 
 
adcsum.v
adcsum.v
 
 
adcsum_tb.v
adcsum_tb.v
 
 
average.v
average.v
 
 
buffer.v
buffer.v
 
 
buffer_dual_clk.v
buffer_dual_clk.v
 
 
click_counter_encaps.v
click_counter_encaps.v
 
 
clk_buffer.v
clk_buffer.v
 
 
clk_buffer_single.v
clk_buffer_single.v
 
 
clk_monoflop.v
clk_monoflop.v
 
 
clk_monoflop_tb.v
clk_monoflop_tb.v
 
 
clk_timed_monoflop.v
clk_timed_monoflop.v
 
 
clock_detect.v
clock_detect.v
 
 
clock_gen.v
clock_gen.v
 
 
cmdmem.coe
cmdmem.coe
 
 
counter2b.v
counter2b.v
 
 
counter4b.v
counter4b.v
 
 
counters.v
counters.v
 
 
counters_tb.v
counters_tb.v
 
 
dacsys.v
dacsys.v
 
 
data_fifo_tb.v
data_fifo_tb.v
 
 
datamem.coe
datamem.coe
 
 
dcm180.v
dcm180.v
 
 
dcm90180.v
dcm90180.v
 
 
ddr2_test.v
ddr2_test.v
 
 
ddssys.v
ddssys.v
 
 
delay_counter_tb.v
delay_counter_tb.v
 
 
delay_generator.v
delay_generator.v
 
 
delay_generator_no_retrigger.v
delay_generator_no_retrigger.v
 
 
delayed_on_gate.v
delayed_on_gate.v
 
 
delayed_on_gate_tb.v
delayed_on_gate_tb.v
 
 
detect_change.v
detect_change.v
 
 
divider_64bit_tb.v
divider_64bit_tb.v
 
 
divider_wrapper.v
divider_wrapper.v
 
 
divider_wrapper_tb.v
divider_wrapper_tb.v
 
 
edge_buffer.v
edge_buffer.v
 
 
flag_crossdomain.v
flag_crossdomain.v
 
 
ledblink.v
ledblink.v
 
 
license.txt
license.txt
 
 
logic_analyzer.v
logic_analyzer.v
 
 
logic_analyzer_tb.v
logic_analyzer_tb.v
 
 
logic_analyzer_wrapper.v
logic_analyzer_wrapper.v
 
 
logic_analyzer_wrapper_tb.v
logic_analyzer_wrapper_tb.v
 
 
memc3_infrastructure.v
memc3_infrastructure.v
 
 
memc3_infrastructure_tb.v
memc3_infrastructure_tb.v
 
 
monoflop.v
monoflop.v
 
 
monoflop_sync.v
monoflop_sync.v
 
 
multibit_set_reset.v
multibit_set_reset.v
 
 

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IonControl-firmware

Sources of the firmware running on the Xilinx FPGA used in the IonControl project.

The FPGA verilog sources are designed for the Opal Kellly XEM-6010 boards with Xilinx Spartan-6 LX-45 (use branch master-LX45) or LX-150 (use branch master). For comilation the Xilinx ISE tool is necessary. Compilation can be done with the version freely available from Xilinx for the LX-45 FPGA, the LX-150 requires a Vivado license.

To compile, first open the Core generator and regenerate all cores with current project settings, then compile the project.

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Sources of the firmware running on the Xilinx FPGA used in the IonControl project

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License

GPL-3.0 and 2 other licenses found

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GPL-3.0
LICENSE
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license.txt
GPL-3.0
COPYING.txt
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