Drawers support for "partial" layout

[1ucian0]

Fixes #4757

Consider the following example, where the circuit is smaller than the initial_layout length:

from qiskit import QuantumCircuit, transpile
from qiskit.test.mock import FakeTenerife

circuit = QuantumCircuit(3)
circuit.h(1)
transpiled = transpile(circuit, backend=FakeTenerife(),
                             optimization_level=0, initial_layout=list(range(5)),
                             seed_transpiler=0)

This PR allows this situation in all drawers:

transpiled.draw('text')

q_0 -> 0 ────────────
         ┌──────────┐
q_1 -> 1 ┤ U2(0,pi) ├
         └──────────┘
q_2 -> 2 ────────────
                     
       3 ────────────
                     
       4 ────────────

transpiled.draw('mpl')

transpiled.draw('latex')

Binder link: https://mybinder.org/v2/gh/1ucian0/qiskit-terra/4757?urlpath=apps/test/ipynb/mpl_tester.ipynb

[mtreinish]

LGTM, the only question I had is what if the index isn't in layout at all instead of None. But I guess that edge case isn't realistiic