Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Fix DenseLayout when loose bits are present in input circuit #8843

Merged
merged 2 commits into from
Oct 6, 2022
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 2 additions & 4 deletions qiskit/transpiler/passes/layout/dense_layout.py
Original file line number Diff line number Diff line change
Expand Up @@ -98,11 +98,9 @@ def run(self, dag):

best_sub = self._best_subset(num_dag_qubits, num_meas, num_cx)
layout = Layout()
map_iter = 0
for i, qubit in enumerate(dag.qubits):
layout.add(qubit, int(best_sub[i]))
for qreg in dag.qregs.values():
for i in range(qreg.size):
layout[qreg[i]] = int(best_sub[map_iter])
map_iter += 1
layout.add_register(qreg)
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I don't even know why Layout tracks registers, but it does seem to be part of the interface, so best to keep it. I'm guessing it's from before, when registers owned qubits.

Copy link
Member Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Yeah, neither am I, and tbh I don't think it is 100% needed here anymore as without this all the tests passed, but I kept it in just in case there was something I wasn't considering.

self.property_set["layout"] = layout

Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,7 @@
---
fixes:
- |
Fixed an issue in the :class:`~.DenseLayout` transpiler pass where any
loose :class:`~.Qubit` objects (i.e. not part of a :class:`~.QuantumRegister`)
that were part of a :class:`~.QuantumCircuit` would not be included in the
output :class:`~.Layout` that was generated by the pass.
22 changes: 21 additions & 1 deletion test/python/transpiler/test_dense_layout.py
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@
import numpy as np

from qiskit import QuantumRegister, QuantumCircuit, ClassicalRegister
from qiskit.circuit import Parameter
from qiskit.circuit import Parameter, Qubit
from qiskit.circuit.library import CXGate, UGate, ECRGate, RZGate
from qiskit.transpiler import CouplingMap, Target, InstructionProperties, TranspilerError
from qiskit.transpiler.passes import DenseLayout
Expand Down Expand Up @@ -218,6 +218,26 @@ def test_5q_circuit_20q_with_if_else(self):
self.assertEqual(layout[qr[3]], 5)
self.assertEqual(layout[qr[4]], 0)

def test_loose_bit_circuit(self):
"""Test dense layout works with loose bits outside a register."""
bits = [Qubit() for _ in range(5)]
circuit = QuantumCircuit()
circuit.add_bits(bits)
circuit.h(3)
circuit.cx(3, 4)
circuit.cx(3, 2)
circuit.cx(3, 0)
circuit.cx(3, 1)
dag = circuit_to_dag(circuit)
pass_ = DenseLayout(CouplingMap(self.cmap20))
pass_.run(dag)
layout = pass_.property_set["layout"]
self.assertEqual(layout[bits[0]], 11)
self.assertEqual(layout[bits[1]], 10)
self.assertEqual(layout[bits[2]], 6)
self.assertEqual(layout[bits[3]], 5)
self.assertEqual(layout[bits[4]], 0)


if __name__ == "__main__":
unittest.main()