Merge #19440

19440: cpu/rpx0xx: implement periph_spi r=dylad a=fengelhardt Co-authored-by: Frank Engelhardt <fengelha@ovgu.de>
RIOT-OS · May 2, 2023 · 33489da · 33489da
2 parents 8573fab + 7768206
commit 33489da
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diff --git a/boards/rpi-pico/Kconfig b/boards/rpi-pico/Kconfig
@@ -14,5 +14,6 @@ config BOARD_RPI_PICO
     select CPU_MODEL_RP2040
     select HAS_PERIPH_ADC
     select HAS_PERIPH_UART
+    select HAS_PERIPH_SPI
 
     select HAVE_SAUL_GPIO
diff --git a/boards/rpi-pico/Makefile.features b/boards/rpi-pico/Makefile.features
@@ -2,5 +2,6 @@ CPU := rpx0xx
 
 # Put defined MCU peripherals here (in alphabetical order)
 FEATURES_PROVIDED += periph_adc
+FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
diff --git a/boards/rpi-pico/include/periph_conf.h b/boards/rpi-pico/include/periph_conf.h
@@ -48,6 +48,23 @@ static const uart_conf_t uart_config[] = {
 
 #define UART_NUMOF      ARRAY_SIZE(uart_config)
 
+static const spi_conf_t spi_config[] = {
+    {
+        .dev = SPI0,
+        .miso_pin = GPIO_PIN(0, 4),
+        .mosi_pin = GPIO_PIN(0, 3),
+        .clk_pin = GPIO_PIN(0, 2)
+    },
+    {
+        .dev = SPI1,
+        .miso_pin = GPIO_PIN(0, 12),
+        .mosi_pin = GPIO_PIN(0, 11),
+        .clk_pin = GPIO_PIN(0, 10)
+    }
+};
+
+#define SPI_NUMOF      ARRAY_SIZE(spi_config)
+
 static const timer_channel_conf_t timer0_channel_config[] = {
     {
         .irqn = TIMER_IRQ_0_IRQn

diff --git a/cpu/rpx0xx/include/periph_cpu.h b/cpu/rpx0xx/include/periph_cpu.h
@@ -731,6 +731,39 @@ void rosc_stop(void);
 
 /** @} */
 
+/**
+ * @brief   Override SPI clock speed values
+ * @{
+ */
+#define HAVE_SPI_CLK_T
+enum {
+    SPI_CLK_100KHZ = KHZ(100), /**< drive the SPI bus with 100KHz */
+    SPI_CLK_400KHZ = KHZ(400), /**< drive the SPI bus with 400KHz */
+    SPI_CLK_1MHZ   = MHZ(1),   /**< drive the SPI bus with 1MHz */
+    SPI_CLK_5MHZ   = MHZ(5),   /**< drive the SPI bus with 5MHz */
+    SPI_CLK_10MHZ  = MHZ(10),  /**< drive the SPI bus with 10MHz */
+};
+
+/**
+ * @brief   SPI clock type
+ */
+typedef uint32_t spi_clk_t;
+/** @} */
+
+/**
+ * @brief   Configuration details for an SPI interface needed by the RPX0XX peripheral
+ */
+typedef struct {
+    SPI0_Type *dev;     /**< Base address of the I/O registers of the device */
+    gpio_t miso_pin;    /**< GPIO pin to use for MISO */
+    gpio_t mosi_pin;    /**< GPIO pin to use for MOSI */
+    gpio_t clk_pin;     /**< GPIO pin to use for CLK */
+} spi_conf_t;
+
+#define PERIPH_SPI_NEEDS_TRANSFER_REG
+#define PERIPH_SPI_NEEDS_TRANSFER_REGS
+#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
+
 #ifdef __cplusplus
 }
 #endif