cpu/esp32: rename CPU_INUM_RTC to CPU_INUM_RTT

RIOT-OS · Jun 28, 2022 · 4be0abf · 4be0abf
1 parent 6bd6afb
commit 4be0abf
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Showing 4 changed files with 12 additions and 12 deletions.
diff --git a/cpu/esp32/include/irq_arch.h b/cpu/esp32/include/irq_arch.h
@@ -39,7 +39,7 @@ extern "C" {
 #define CPU_INUM_GPIO       2   /**< Level interrupt with low priority 1 */
 #define CPU_INUM_CAN        3   /**< Level interrupt with low priority 1 */
 #define CPU_INUM_UART       5   /**< Level interrupt with low priority 1 */
-#define CPU_INUM_RTC        9   /**< Level interrupt with low priority 1 */
+#define CPU_INUM_RTT        9   /**< Level interrupt with low priority 1 */
 #define CPU_INUM_I2C        12  /**< Level interrupt with low priority 1 */
 #define CPU_INUM_WDT        13  /**< Level interrupt with low priority 1 */
 #define CPU_INUM_SOFTWARE   17  /**< Level interrupt with low priority 1 */

diff --git a/cpu/esp32/irq_arch.c b/cpu/esp32/irq_arch.c
@@ -46,7 +46,7 @@ typedef struct intr_handle_data_t {
 static const struct intr_handle_data_t _irq_data_table[] = {
     { ETS_FROM_CPU_INTR0_SOURCE, CPU_INUM_SOFTWARE, 1 },
     { ETS_TG0_WDT_LEVEL_INTR_SOURCE, CPU_INUM_WDT, 1 },
-    { ETS_TG0_T0_LEVEL_INTR_SOURCE, CPU_INUM_RTC, 1 },
+    { ETS_TG0_T0_LEVEL_INTR_SOURCE, CPU_INUM_RTT, 1 },
 #if defined(MCU_ESP32) || defined(MCU_ESP32S2) || defined(MCU_ESP32S3)
     { ETS_TG0_T1_LEVEL_INTR_SOURCE, CPU_INUM_TIMER, 2 },
 #endif

diff --git a/cpu/esp32/periph/rtt_hw_rtc.c b/cpu/esp32/periph/rtt_hw_rtc.c
@@ -74,18 +74,18 @@ static void _rtc_init(void)
 static void _rtc_poweron(void)
 {
     /* route all interrupt sources to the same RTT level type interrupt */
-    intr_matrix_set(PRO_CPU_NUM, ETS_RTC_CORE_INTR_SOURCE, CPU_INUM_RTC);
+    intr_matrix_set(PRO_CPU_NUM, ETS_RTC_CORE_INTR_SOURCE, CPU_INUM_RTT);
 
     /* set interrupt handler and enable the CPU interrupt */
-    xt_set_interrupt_handler(CPU_INUM_RTC, _rtc_isr, NULL);
-    xt_ints_on(BIT(CPU_INUM_RTC));
+    xt_set_interrupt_handler(CPU_INUM_RTT, _rtc_isr, NULL);
+    xt_ints_on(BIT(CPU_INUM_RTT));
 }
 
 static void _rtc_poweroff(void)
 {
     /* reset interrupt handler and disable the CPU interrupt */
-    xt_ints_off(BIT(CPU_INUM_RTC));
-    xt_set_interrupt_handler(CPU_INUM_RTC, NULL, NULL);
+    xt_ints_off(BIT(CPU_INUM_RTT));
+    xt_set_interrupt_handler(CPU_INUM_RTT, NULL, NULL);
 }
 
 uint64_t _rtc_get_counter(void)

diff --git a/cpu/esp32/periph/rtt_hw_sys.c b/cpu/esp32/periph/rtt_hw_sys.c
@@ -74,18 +74,18 @@ static void _sys_init(void)
 static void _sys_poweron(void)
 {
     /* route all interrupt sources to the same RTT level type interrupt */
-    intr_matrix_set(PRO_CPU_NUM, TIMER_SYSTEM_INT_SRC, CPU_INUM_RTC);
+    intr_matrix_set(PRO_CPU_NUM, TIMER_SYSTEM_INT_SRC, CPU_INUM_RTT);
 
     /* set interrupt handler and enable the CPU interrupt */
-    xt_set_interrupt_handler(CPU_INUM_RTC, _sys_isr, NULL);
-    xt_ints_on(BIT(CPU_INUM_RTC));
+    xt_set_interrupt_handler(CPU_INUM_RTT, _sys_isr, NULL);
+    xt_ints_on(BIT(CPU_INUM_RTT));
 }
 
 static void _sys_poweroff(void)
 {
     /* reset interrupt handler and disable the CPU interrupt */
-    xt_ints_off(BIT(CPU_INUM_RTC));
-    xt_set_interrupt_handler(CPU_INUM_RTC, NULL, NULL);
+    xt_ints_off(BIT(CPU_INUM_RTT));
+    xt_set_interrupt_handler(CPU_INUM_RTT, NULL, NULL);
 }
 
 static uint64_t _sys_get_counter(void)