boards/common/blxxxpill: change PWM and QDEC configuration

- Use pins PB0, PB1, PB4, and PB5 for PWM instead PA8, PA9, PA10, and
  PA11
    - PA9 and PA10 is in pin conflict with UART_DEV(0) which is used
      for stdio with stdio_uart, PA8 was in conflict with QDEC_DEV(0),
      PA11 was in conflict with USB D-
- Use PB6, PB7 as QDEC_DEV(0) (previously QDEC_DEV(2)), as this is the
  only completely conflict free setting
- Use PB4/PB5 instead of PA6/PA7 for QDEC_DEV(1)
    - This fixes a pin conflict with SPI_DEV(0) MISO (and ADC_LINE(4))
- Only provide QDEC at PB4/PB5 when PWM is not used to avoid conflict
- Only provide QDEC at PA8/PA9 when UART is not used to avoid conflict

boards/common/blxxxpill/include/periph_conf.h

@@ -134,33 +134,41 @@ static const timer_conf_t timer_config[] = {
  */
 
 static const qdec_conf_t qdec_config[] = {
+    {
+        .dev        = TIM4,
+        .max        = 0x0000ffff,
+        .rcc_mask   = RCC_APB1ENR_TIM4EN,
+        .chan       = { { .pin = GPIO_PIN(PORT_B, 6),   .cc_chan = 0 },
+                        { .pin = GPIO_PIN(PORT_B, 7),   .cc_chan = 1 } },
+        .bus        = APB1,
+        .irqn       = TIM4_IRQn,
+    },
+    /* this conflicts with PWM */
+#ifndef MODULE_PERIPH_PWM
+    {
+        .dev        = TIM3,
+        .max        = 0x0000ffff,
+        .rcc_mask   = RCC_APB1ENR_TIM3EN,
+        .chan       = { { .pin = GPIO_PIN(PORT_B, 4),   .cc_chan = 0 },
+                        { .pin = GPIO_PIN(PORT_B, 5),   .cc_chan = 1 } },
+        .bus        = APB1,
+        .irqn       = TIM3_IRQn,
+        /* by default TIM3 is routed to PA6 (cc_chan 0) and PA7 (cc_chan 1) */
+        .remap      = AFIO_MAPR_TIM3_REMAP_1,
+    },
+#endif
+    /* this conflicts with UART */
+#ifndef MODULE_PERIPH_UART
     {
         .dev      = TIM1,
         .max      = 0x0000ffff,
         .rcc_mask = RCC_APB2ENR_TIM1EN,
-        .chan     = { { .pin = GPIO_PIN(PORT_A, 8),             .cc_chan = 0 },
-                      { .pin = GPIO_PIN(PORT_A, 9),             .cc_chan = 1 } },
+        .chan     = { { .pin = GPIO_PIN(PORT_A, 8),     .cc_chan = 0 },
+                      { .pin = GPIO_PIN(PORT_A, 9),     .cc_chan = 1 } },
         .bus      = APB2,
         .irqn     = TIM1_UP_IRQn
     },
-    {
-        .dev      = TIM3,
-        .max      = 0x0000ffff,
-        .rcc_mask = RCC_APB1ENR_TIM3EN,
-        .chan     = { { .pin = GPIO_PIN(PORT_A, 6),             .cc_chan = 0 },
-                      { .pin = GPIO_PIN(PORT_A, 7),             .cc_chan = 1 } },
-        .bus      = APB1,
-        .irqn     = TIM3_IRQn
-    },
-    {
-        .dev      = TIM4,
-        .max      = 0x0000ffff,
-        .rcc_mask = RCC_APB1ENR_TIM4EN,
-        .chan     = { { .pin = GPIO_PIN(PORT_B, 6),             .cc_chan = 0 },
-                      { .pin = GPIO_PIN(PORT_B, 7),             .cc_chan = 1 } },
-        .bus      = APB1,
-        .irqn     = TIM4_IRQn
-    }
+#endif
 };
 
 #define QDEC_NUMOF           ARRAY_SIZE(qdec_config)
@@ -256,15 +264,24 @@ static const i2c_conf_t i2c_config[] = {
  */
 static const pwm_conf_t pwm_config[] = {
     {
-        .dev      = TIM1,
-        .rcc_mask = RCC_APB2ENR_TIM1EN,
-        .chan     = { { .pin = GPIO_PIN(PORT_A, 8),  .cc_chan = 0 },
-                      { .pin = GPIO_PIN(PORT_A, 9),  .cc_chan = 1 },
-                      { .pin = GPIO_PIN(PORT_A, 10), .cc_chan = 2 },
-                      { .pin = GPIO_PIN(PORT_A, 11), .cc_chan = 3 } },
+        .dev      = TIM3,
+        .rcc_mask = RCC_APB1ENR_TIM3EN,
+        .chan     = {
+                        { .pin = GPIO_PIN(PORT_B, 4), .cc_chan = 0 },
+                        { .pin = GPIO_PIN(PORT_B, 5), .cc_chan = 1 },
+#if !defined(BOARD_BLACKPILL) && !defined(BOARD_BLACKPILL_128KIB)
+                        /* The blackpill has a few pins less. PB0 and PB1 are
+                         * among the GPIOs not exposed due to the lower
+                         * pincount */
+                        { .pin = GPIO_PIN(PORT_B, 0), .cc_chan = 2 },
+                        { .pin = GPIO_PIN(PORT_B, 1), .cc_chan = 3 },
+#endif
+                    },
         .af       = GPIO_AF_OUT_PP,
-        .bus      = APB2
-    }
+        .bus      = APB1,
+        /* by default TIM3 is routed to PA6 (cc_chan 0) and PA7 (cc_chan 1) */
+        .remap      = AFIO_MAPR_TIM3_REMAP_1,
+    },
 };
 
 #define PWM_NUMOF ARRAY_SIZE(pwm_config)

examples/saul/Makefile

@@ -12,8 +12,10 @@ USEMODULE += saul_default
 # include the shell:
 USEMODULE += shell
 USEMODULE += shell_cmds_default
+USEMODULE += shell_cmd_i2c_scan
 # additional modules for debugging:
 USEMODULE += ps
+USEMODULE += sht3x
 
 # Comment this out to disable code in RIOT that does safety checking
 # which is not needed in a production environment but helps in the