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cpu/msp430: USCI not working with auxiliary clock #20620

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maribu opened this issue Apr 24, 2024 · 1 comment · Fixed by #20623
Closed

cpu/msp430: USCI not working with auxiliary clock #20620

maribu opened this issue Apr 24, 2024 · 1 comment · Fixed by #20623

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@maribu
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maribu commented Apr 24, 2024

Description

There is bug in the USCI driver that is triggered when the USCI is clocked by the auxiliary clock, e.g. by reducing the symbol rate of the UART to 9600 Bd.

Steps to reproduce the issue

Reduce the symbol rate of the UART to 9600 Bd.

Expected results

UART still works

Actual results

Broken stdio output (did not check with a logic analyzer yet)

Versions

master
@maribu
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maribu commented Apr 24, 2024

@Teufelchen1 This is regression that made it into the release. The old USCI driver never used the auxiliary clock (and does not allow more than one UART interface or SPI bus to be used).

I don't think it is much of an issue, because:

a) its a niche MCU within our community
b) none of the supported boards with the affected MSP430 F2xx MCU family uses the auxiliary clock to clock the USCI peripherals. Only the MSP430 x1xxx boards that use the older USARTs instead of the "newer" USCIs do use 9600 Bd, but there the auxiliary clock works fine

I plan to fix this eventually, but with no urgency or intention of backporting. It might be good to document this issue, though.

maribu added a commit to maribu/RIOT that referenced this issue Apr 25, 2024
@maribu
cpu/msp430/perriph_usci: fix prescaler values for ACLK
4c0d6f8 
For super low symbol rates the auxiliary clock (ACLK) is used to
conserve power. But with only 32,678 Hz clock just prescaling will
result in poor bit timing, hence correct modulation control settings
to compensate are needed. Since computing this is too expensive, a
look-up table (as switch statement) for the four most common symbol
rates was used.

The datasheet gave the prescaler values ordered by ascending symbol
rate, the switch statement was ordered descending.
This changes the order to match the datasheets order and matches the
correct prescaler setting to the corresponding symbol rate.

Fixes RIOT-OS#20620
@maribu maribu mentioned this issue Apr 25, 2024
Merged
ant9000 pushed a commit to ant9000/RIOT that referenced this issue Aug 23, 2024
@maribu @ant9000
cpu/msp430/perriph_usci: fix prescaler values for ACLK
399435a 
For super low symbol rates the auxiliary clock (ACLK) is used to
conserve power. But with only 32,678 Hz clock just prescaling will
result in poor bit timing, hence correct modulation control settings
to compensate are needed. Since computing this is too expensive, a
look-up table (as switch statement) for the four most common symbol
rates was used.

The datasheet gave the prescaler values ordered by ascending symbol
rate, the switch statement was ordered descending.
This changes the order to match the datasheets order and matches the
correct prescaler setting to the corresponding symbol rate.

Fixes RIOT-OS#20620
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cpu/msp430/perriph_usci: fix prescaler values for ACLK maribu/RIOT
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