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boards/common/blxxxpill: Fix pin conflicts in periph_conf #18785

Merged
merged 4 commits into from
Oct 27, 2022

Commits on Oct 27, 2022

  1. makefiles/cflags.inc.mk: Add -Wno-missing-field-initializers to CXXFLAGS

    This allows including C headers from C++. It sadly reduced the
    diagnostics on C++ code as well, were there warning may make sense as
    unintended side effect. We may be able to drop that later on, when more
    C APIs are properly wrapped in native C++ APIs, so that C headers do no
    longer need to be compatible with C++ compilers.
    maribu committed Oct 27, 2022
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  2. cpu/stm32/periph_qdec: support pin remap for F1

    Add support to route peripheral to alternative pins for the STM32F1
    family.
    maribu committed Oct 27, 2022
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  3. cpu/stm32/periph_pwm: support pin remap for F1

    Add support to route timer peripheral to alternative pins for the
    STM32F1.
    maribu committed Oct 27, 2022
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  4. boards/common/blxxxpill: rework periph configuration

    The peripheral configuration has been completely reworked to resolve
    pin conflicts while provided as much of the peripherals as possible.
    The changes include:
    
    - Move `I2C_DEV(0)` from PB6/PB7 to PB8/PB9 to solve pin conflict with
      `QDEC_DEV(2)`.
    - Use pins PB0, PB1, PB4, and PB5 for PWM instead PA8, PA9, PA10, and
      PA11
        - PA9 and PA10 is in pin conflict with `UART_DEV(0)` which is used
          for stdio with `stdio_uart`, PA8 was in conflict with
          `QDEC_DEV(0)`, PA11 was in conflict with USB D-
    - Use PB6, PB7 as `QDEC_DEV(0)` (previously `QDEC_DEV(2)`), as this is
      the only completely conflict free setting
    - Use PB4/PB5 instead of PA6/PA7 for QDEC_DEV(1)
        - This fixes a pin conflict with `SPI_DEV(0)` MISO (and
          `ADC_LINE(4)`)
    - Only provide QDEC at PB4/PB5 when PWM is not used to avoid conflict
    - Only provide QDEC at PA8/PA9 when UART is not used to avoid conflict
    - Use SPI2 (PB15, PB14, PB13, PB12) as `SPI_DEV(0)` instead of SPI1,
      use SPI1 (PA7, PA6, PA5, PA4) as `SPI_DEV(1)`
    - Only provide `SPI_DEV(1)` if the ADC is not in used to resolve a
      pin conflict
    - Move PB0 and PB1 at the end of the ADC lines (previously
      `ADC_LINE(6)` and `ADC_LINE(7)`, now `ADC_LINE(8)` and `ADC_LINE(9)`)
       - Only provide them when PWM is not in use (to resolve pin conflict
         with PWM)
       - Also do not provide them for the Blackpill boards, which are
         missing pins PB0 and PB1 on the headers
    
    To make life of users easier, a Pinout diagram with the new
    configuration was added.
    maribu committed Oct 27, 2022
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