cpu/gd32v: add periph_pwm support #19209
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When a timer is set, any pending interrupts must be cleared before the interrupt is enabled for the channel. Otherwise the interrupt would be triggered immediately when the timer is set.
The default timer configuration has been changed so that `TIMER0` and `TIMER1` are always timer devices. `TIMER2` can only be used as timer device if it is not used for PWM devices. `TIMER3` and `TIMER4` are only available as timer devices if they are supported by the CPU model and not used for PWM devices.
gschorcht
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MrKevinWeiss
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@benpicco Thanks for reviewing and merging |
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Contribution description
This PR provides the
periph_pwmsupport for GD32VF103.It includes a bug fix (2c6e527) of
periph_timerwhich clears pending interrupts on setting the timer before the interrupt is enabled. This avoids that a pending interrupt is triggered immediately when the timer is set. The bug causedtests/periph_timerandtests/periph_timer_periodicto crash. (I could split-off this bug fix if necessary).Furthermore, the default timer configuration has been extended and reordered.
TIMER0can be used now as timer device (0dfbdeb). The default timer configuration has been changed (377b5b3) so thatTIMER0andTIMER1are always timer devices.TIMER2can only be used as timer device if it is not used for PWM devices.TIMER3andTIMER4are only available as timer devices if they are supported by the CPU model and not used for PWM devices.Testing procedure
tests/periph_timerandtests/periph_timer_periodicshould work now. Without the PR, these tests lead to kernel panic.tests/periph_pwmshould work on any GD32VF103 board. Commandoscishould also let LED1 and LED2 oscillate.Issues/PRs references