cpu/nrf52 i2c: Wait for complete transmission when writing NOSTOP #20299
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
chrysn
added
Type: bug
github-actions
bot
added
the
Platform: ARM
This was referenced Jan 25, 2024
benpicco
added
CI: ready for build
benpicco
reviewed
Jan 26, 2024
chrysn
force-pushed
the
nrf52-spi-bugs-2
branch
from
a4dfe4e
to
790e808
Compare
chrysn
added
CI: skip compile test
|
Thanks for your review and fixes. I've set "skip compile tests" due to clearly unrelated test failures (native:llvm tests/sys/ztimer_overhead), let's see if that actually works with the current CI setup. |
benpicco
removed
the
CI: skip compile test
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Contribution description
(Reviewers, beware that the first two commits are actually #20298, see below for details).
When #20282 which enabled continuation from NOSTOP writes on nRF52 I2C in the first place, my hope was that waiting for the LASTTX signal and then starting a read operation could rely on the hardware to synchronize -- after all, LASTTX indicates that the write was started, so the hardware would not cancel the write in progress when there is a subsequent read, especially when the hardware doesn't signal that the last transmission was completed in situations when NOSTOP is required, right?
Nope:
The capture shows that a write operation is started, the address is written with the W bit, ACKed, and then before the last byte (the only byte) containing the I2C device's register number is written, the bus already goes into a repeated start (Sr in PulseView's output) mode, and starts reading.
For lack of a signal from the TWIM (nRF52's dreaded I2C implementation), the finish function waits for the LASTTX signal, and then busy-loops until the number of bytes written matches the number of bytes that should be written.
Testing procedure
With a microbit-v2, I ran my lsm303agr-1.0-2 branch's SAUL test. Without this patch, its
saul read 7reports all zeros; with this patch, it should report around 1g of gravity depending on your location.Issues/PRs references
This is a follow-up on #20282. The commit history also includes #20298 because the test depends on it. Those two are as independent as two PRs fixing stuff for the same peripheral can be.