sys/byteorder: clean up implementation

cpu/sam0_common/include/cpu_conf.h

@@ -23,12 +23,6 @@
 
 #include "cpu_conf_common.h"
 
-/* Workaround redefinition of LITTLE_ENDIAN macro (part1) */
-#ifdef LITTLE_ENDIAN
-#define __TMP_LITTLE_ENDIAN     LITTLE_ENDIAN
-#undef LITTLE_ENDIAN
-#endif
-
 #if defined(CPU_SAMD10)
 #include "vendor/samd10/include/samd10.h"
 #elif defined(CPU_SAMD20)
@@ -63,15 +57,6 @@
 #include "vendor/samr34/include/samr34.h"
 #endif
 
-/* Workaround redefinition of LITTLE_ENDIAN macro (part2) */
-#ifdef LITTLE_ENDIAN
-#undef LITTLE_ENDIAN
-#endif
-
-#ifdef __TMP_LITTLE_ENDIAN
-#define LITTLE_ENDIAN       __TMP_LITTLE_ENDIAN
-#endif
-
 #ifdef __cplusplus
 extern "C" {
 #endif

cpu/sam0_common/include/vendor/README.md

@@ -40,10 +40,18 @@ changes will be lost when a new ASF release is going to be used.
 
 Many of the header files where generated with an outdated version of SVDConv
 that adds the `__I` qualifier to anonymous bit fields, which `clang++` won't
-compile. Run the script `fix_cxx_compat.sh` in this directory whenever you
+compile. Run the script `fix_headers.sh` in this directory whenever you
 add or update vendor header filers until Microchips starts using a fixed version
 of SVDConv.
 
+### compatibility with tinyDTLS and `<endian.h>`
+
+Both tinyDTLS as well as `<endian.h>` expect `LITTLE_ENDIAN` to be a magic
+number to compare the byte order (as provided by the compiler) against. The
+vendor header files provide the macro with the wrong magic number without
+ever using this macro. We can just strip using the `fix_headers.sh` script
+in this directory.
+
 ### sam0.h
 
 A SAM based CPU should include `sam0.h` in this directory, which will

cpu/sam0_common/include/vendor/fix_headers.sh

@@ -0,0 +1,29 @@
+#!/bin/sh
+
+# This function removes type qualifiers from anonymous padding fields in bit
+# fields for compatibility with clang++.
+strip_type_qualifiers_from_bit_fields() {
+    echo "Searching for header files with bogus type qualifiers"
+    offenders="$(grep -Erl '__I [u]*int[0-9]*_t[ \t]*:[0-9]*;')"
+
+    for file in $offenders; do
+        echo "Sanitizing $file for type qualifiers in padding"
+        sed -i "$file" -e 's/__I \([u]*int[0-9]*_t[\t ]*:[0-9]*;\)/\1    /g'
+    done
+}
+
+# This functions removes a bogus `LITTLE_ENDIAN` define which conflicts with
+# <endian.h> and tinyDTLS notion of it. Luckily, that define is not used
+# anywhere in the vendor header files, so we can just drop it.
+remove_bogus_endian_define() {
+    echo "Searching for header files with bogus LITTLE_ENDIAN define"
+    offenders="$(grep -rl '^#define LITTLE_ENDIAN')"
+
+    for file in $offenders; do
+        echo "Removing bogus LITTLE_ENDIAN define from $file"
+        sed -i "$file" -e '/^#define LITTLE_ENDIAN/d'
+    done
+}
+
+strip_type_qualifiers_from_bit_fields
+remove_bogus_endian_define

cpu/sam0_common/include/vendor/samr21/include/samr21e16a.h

@@ -216,7 +216,6 @@ void PTC_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

cpu/sam0_common/include/vendor/samr21/include/samr21e17a.h

@@ -216,7 +216,6 @@ void PTC_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

cpu/sam0_common/include/vendor/samr21/include/samr21e18a.h

@@ -216,7 +216,6 @@ void PTC_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

cpu/sam0_common/include/vendor/samr21/include/samr21e19a.h

@@ -216,7 +216,6 @@ void PTC_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

cpu/sam0_common/include/vendor/samr21/include/samr21g16a.h

@@ -216,7 +216,6 @@ void PTC_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

cpu/sam0_common/include/vendor/samr21/include/samr21g17a.h

@@ -216,7 +216,6 @@ void PTC_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

cpu/sam0_common/include/vendor/samr21/include/samr21g18a.h

@@ -216,7 +216,6 @@ void PTC_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1        
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

cpu/sam0_common/include/vendor/samr30/include/samr30e18a.h

@@ -234,7 +234,6 @@ void PTC_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

cpu/sam0_common/include/vendor/samr30/include/samr30g18a.h

@@ -234,7 +234,6 @@ void PTC_Handler                 ( void );
  * \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
  */
 
-#define LITTLE_ENDIAN          1
 #define __CM0PLUS_REV          1         /*!< Core revision r0p1 */
 #define __MPU_PRESENT          0         /*!< MPU present or not */
 #define __NVIC_PRIO_BITS       2         /*!< Number of bits used for Priority Levels */

pkg/esp8266_sdk/patches/0002-components-lwip-port-esp8266-use-endian.h.patch

@@ -0,0 +1,30 @@
+From 64a9b435bcc38a11568854f31845e58f11a0001e Mon Sep 17 00:00:00 2001
+From: Marian Buschsieweke <marian.buschsieweke@posteo.net>
+Date: Thu, 1 Feb 2024 18:22:27 +0100
+Subject: [PATCH] components/lwip/port/esp8266: use <endian.h>
+
+Now that there is an `<endian.h>`, it can be used :)
+---
+ components/lwip/port/esp8266/include/arch/cc.h | 6 +-----
+ 1 file changed, 1 insertion(+), 5 deletions(-)
+
+diff --git a/components/lwip/port/esp8266/include/arch/cc.h b/components/lwip/port/esp8266/include/arch/cc.h
+index c815a67..1648fc0 100644
+--- a/components/lwip/port/esp8266/include/arch/cc.h
++++ b/components/lwip/port/esp8266/include/arch/cc.h
+@@ -38,11 +38,7 @@
+
+ #define LWIP_ERRNO_INCLUDE "sys/errno.h"
+
+-#if (1)
+-#define BYTE_ORDER LITTLE_ENDIAN
+-#else
+-#define BYTE_ORDER BIG_ENDIAN
+-#endif
++#include <endian.h>
+
+ typedef int sys_prot_t;
+
+-- 
+2.43.0
+

pkg/tinydtls/patches/0002-platform-specific-riot_boards.h-fix-conflict-with-en.patch

@@ -0,0 +1,44 @@
+From 9b62250bf6561aed372429eb551bd75f8f5fde16 Mon Sep 17 00:00:00 2001
+From: Marian Buschsieweke <marian.buschsieweke@posteo.net>
+Date: Wed, 31 Jan 2024 17:58:13 +0100
+Subject: [PATCH] platform-specific/riot_boards.h: fix conflict with endian.h
+
+---
+ platform-specific/riot_boards.h | 23 -----------------------
+ 1 file changed, 23 deletions(-)
+
+diff --git a/platform-specific/riot_boards.h b/platform-specific/riot_boards.h
+index f18e5ae..d7680d5 100644
+--- a/platform-specific/riot_boards.h
++++ b/platform-specific/riot_boards.h
+@@ -126,27 +126,4 @@
+ /* RIOT "supports" memset()/memcpy() BUT not bzero()/mcopy(). */
+ #define SHA2_USE_MEMSET_MEMCPY 1
+
+-
+-/*
+- * NOTE Gcc is who define if we are big endian or little endian.
+- * Because RIOT has __BYTE_ORDER__ and BYTE_ORDER it is not clear which one
+- * should take preference here. Or, if the #define inside of sha2/sha2.h
+- * should be removed at all.
+- */
+-#ifndef BIG_ENDIAN
+-#if !defined(__BIG_ENDIAN__)
+-#    define BIG_ENDIAN    4321
+-#  else
+-#    define BIG_ENDIAN    __BIG_ENDIAN__
+-#  endif
+-#endif
+-
+-#ifndef LITTLE_ENDIAN
+-#if !defined(__LITTLE_ENDIAN__)
+-#    define LITTLE_ENDIAN    1234
+-#  else
+-#    define LITTLE_ENDIAN    __LITTLE_ENDIAN__
+-#  endif
+-#endif
+-
+ #endif /* _RIOT_BOARDS_H_ */
+-- 
+2.43.0
+