cpu/msp430: implement power management #20613
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Platform: MSP
maribu
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State: waiting for other PR
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Now with low symbol rates working on the MSP430 F2xx, it turned out that the auxiliary clock will not be auto-acquired by the USCI. (The datasheet indeed does only claim that the SMCLK will be acquired as needed by the UART peripheral, so this does check out.) Anyway, fixed :) |
benpicco
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The register r2 is the status register, which has the SR alias. Using SR is a lot more readable than r2.
This implements `pm_set_lowest()` for the MSP430. Unlike most other platforms, it intentionally does not use pm_layered. It is pretty similar to `pm_layered` in that is does use reference counters, but it uses them for two independent clock sources. The main difference is that the low frequency clock domain can be disabled even when the high frequency clock is still active. With the layers, disabling layer n-1 while layer n is still blocked would not work.
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rebased on top of #20623 |
benpicco
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May 6, 2024
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maribu
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MichelRottleuthner
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Area: tests
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Thx a bunch :) |
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Contribution description
This implements power management for the MSP430.
Testing procedure
Flash this on any MSP430 board. No regressions should occur, but power consumption should drop. Your mileage may wary, though:
Benchmarks
I attached a power monitor in-between the USB connection to our Olimex MSP430Hxxx breakout board and monitored the power consumption in the following scenarios:
/dev/ttyUSB0open). This is the baseline, as this power is used even without the MCU actually attachedexmaples/defaultfrommasterflashed, and firsthelpthenpsrunexmaples/defaultfrom this PR flashed, and firsthelpthenpsrunBenchmark on the
olimex-msp430h1611Benchmark on the
olimex-msp430h2618Conclusion
The power consumption goes down pretty much to the base line for each MCU family while the MCU is not in use, but spikes when there is activity. It looks pretty much like one would expect.
Issues/PRs references