USB device stack

Makefile.pseudomodules

@@ -23,3 +23,5 @@ PSEUDOMODULES += netif
 # include variants of the AT86RF2xx drivers as pseudo modules
 PSEUDOMODULES += at86rf23%
 PSEUDOMODULES += at86rf21%
+
+PSEUDOMODULES += usbdev-acm

boards/frdm-k64f/include/periph_conf.h

@@ -37,12 +37,12 @@ extern "C"
 #define KINETIS_MCG_USE_PLL          1
 #define KINETIS_MCG_DCO_RANGE        (24000000U)
 #define KINETIS_MCG_ERC_OSCILLATOR   0
-#define KINETIS_MCG_ERC_FRDIV        6           /* ERC devider = 1280 */
+#define KINETIS_MCG_ERC_FRDIV        7           /* ERC devider = 1536 */
 #define KINETIS_MCG_ERC_RANGE        2
 #define KINETIS_MCG_ERC_FREQ         50000000
 #define KINETIS_MCG_PLL_PRDIV        19          /* divide factor = 20 */
-#define KINETIS_MCG_PLL_VDIV0        0           /* multiply factor = 24 */
-#define KINETIS_MCG_PLL_FREQ         60000000
+#define KINETIS_MCG_PLL_VDIV0        24          /* multiply factor = 48 */
+#define KINETIS_MCG_PLL_FREQ         120000000
 
 #define CLOCK_CORECLOCK              KINETIS_MCG_PLL_FREQ
 /** @} */
@@ -78,7 +78,12 @@ extern "C"
 * @name UART configuration
 * @{
 */
+#if MODULE_USBDEV
+#define UART_NUMOF                   (2U)
+#define UART_ACM_0_EN                1
+#else
 #define UART_NUMOF                   (1U)
+#endif
 #define UART_0_EN                    1
 #define UART_IRQ_PRIO                1
 #define UART_CLK                     CLOCK_CORECLOCK

boards/pba-d-01-kw2x/include/periph_conf.h

@@ -81,7 +81,12 @@ extern "C"
  * @name UART configuration
  * @{
  */
+#if MODULE_USBDEV
+#define UART_NUMOF          (2U)
+#define UART_ACM_0_EN       1
+#else
 #define UART_NUMOF          (1U)
+#endif
 #define UART_0_EN           1
 #define UART_1_EN           0
 #define UART_IRQ_PRIO       1

core/include/init.h

@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2015 PHYTEC Messtechnik GmbH
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @addtogroup  core_util
+ * @{
+ *
+ * @file
+ * @brief       Macros for initialisation of subsystem and drivers
+ *
+ * @author      Johann Fischer <j.fischer@phytec.de>
+ */
+
+#ifndef INIT_H_
+#define INIT_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define INIT_ORDER_CORE         0
+#define INIT_ORDER_DRIVER       1
+#define INIT_ORDER_SUBMOD       2
+#define INIT_ORDER_MODULE       3
+
+typedef int (*initcall_t)(void);
+
+#define __system_initcall(name, fp, order) static initcall_t __initcall_##fp##order \
+                                           __attribute__((__used__)) \
+                                           __attribute__((section(".preinit_array." #order "." name))) \
+                                           __attribute__((aligned(sizeof(void*)))) = fp
+
+#define core_init(fp) __system_initcall("core", fp, 0)
+
+#define driver_init(fp) __system_initcall("driver", fp, 1)
+
+#define submod_init(fp) __system_initcall("submod", fp, 2)
+
+#define module_init(fp) __system_initcall("module", fp, 3)
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* INIT_H_ */
+/** @} */

cpu/cortexm_common/ldscripts/cortexm_base.ld

@@ -54,15 +54,18 @@ SECTIONS
         . = ALIGN(4);
         KEEP(*(.init))
         . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
+        /* preinit data */
+        PROVIDE_HIDDEN (__preinit_array_start = .);
+        KEEP(*(SORT(.preinit_array.*)))
+        KEEP(*(.preinit_array))
+        PROVIDE_HIDDEN (__preinit_array_end = .);
 
         . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
+        /* init data */
+        PROVIDE_HIDDEN (__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array))
+        PROVIDE_HIDDEN (__init_array_end = .);
 
         . = ALIGN(0x4);
         KEEP (*crtbegin.o(.ctors))
@@ -74,10 +77,11 @@ SECTIONS
         KEEP(*(.fini))
 
         . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
+        /* fini data */
+        PROVIDE_HIDDEN (__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array))
+        PROVIDE_HIDDEN (__fini_array_end = .);
 
         KEEP (*crtbegin.o(.dtors))
         KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))

cpu/k64f/cpu.c

@@ -23,10 +23,10 @@
 #include "cpu.h"
 #include "cpu_conf.h"
 
-#define SIM_CLKDIV1_60MHZ      (SIM_CLKDIV1_OUTDIV1(0) | \
-                                SIM_CLKDIV1_OUTDIV2(0) | \
+#define SIM_CLKDIV1_120MHZ     (SIM_CLKDIV1_OUTDIV1(0) | \
+                                SIM_CLKDIV1_OUTDIV2(1) | \
                                 SIM_CLKDIV1_OUTDIV3(1) | \
-                                SIM_CLKDIV1_OUTDIV4(2))
+                                SIM_CLKDIV1_OUTDIV4(4))
 
 static void cpu_clock_init(void);
 
@@ -37,6 +37,10 @@ void cpu_init(void)
 {
     /* initialize the Cortex-M core */
     cortexm_init();
+
+    /* disable MPU */
+    MPU_CESR = 0;
+
     /* initialize the clock system */
     cpu_clock_init();
 }
@@ -55,11 +59,22 @@ void cpu_init(void)
 static void cpu_clock_init(void)
 {
     /* setup system prescalers */
-    SIM->CLKDIV1 = (uint32_t)SIM_CLKDIV1_60MHZ;
+    SIM->CLKDIV1 = (uint32_t)SIM_CLKDIV1_120MHZ;
 
     /* RMII RXCLK */
     SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;
     PORTA->PCR[18] &= ~(PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x07));
 
     kinetis_mcg_set_mode(KINETIS_MCG_PEE);
+
+    /*
+     * Setup USBFSOTG clock
+     * USB clock should be 48 MHz, use MCGPLLCLK as clock source
+     * usb_clk = (pll_clk * 2 / 5) = 120 * 2 / 5 = 48MHz
+     */
+#if MODULE_USBDEV
+    SIM->SOPT2 &= ~(SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL_MASK);
+    SIM->SOPT2 |= SIM_SOPT2_USBSRC_MASK | SIM_SOPT2_PLLFLLSEL(1);
+    SIM->CLKDIV2 = SIM_CLKDIV2_USBDIV(4) | SIM_CLKDIV2_USBFRAC_MASK;
+#endif
 }

cpu/kinetis_common/Makefile.include

@@ -5,7 +5,9 @@ export INCLUDES += -I$(RIOTCPU)/kinetis_common/include
 export LINKFLAGS += -L$(RIOTCPU)/kinetis_common/ldscripts
 
 # add the CPU specific code for the linker
+export UNDEF += $(BINDIR)kinetis_common/uart.o
 export UNDEF += $(BINDIR)kinetis_common/fcfield.o
+export UNDEF += $(BINDIR)kinetis_common/usbdev_driver.o
 
 # Define a recipe to build the watchdog disable binary, used when flashing
 $(RIOTCPU)/kinetis_common/dist/wdog-disable.bin: $(RIOTCPU)/kinetis_common/dist/wdog-disable.s

cpu/kinetis_common/uart.c

@@ -26,6 +26,7 @@
 #include "cpu.h"
 #include "thread.h"
 #include "sched.h"
+#include "init.h"
 #include "periph_conf.h"
 #include "periph/uart.h"
 
@@ -53,12 +54,12 @@ static inline void kinetis_set_brfa(KINETIS_UART *dev, uint32_t baudrate, uint32
 #endif
 }
 
-static int init_base(uart_t uart, uint32_t baudrate);
+static int hw_init_base(uart_t uart, uint32_t baudrate);
 
-int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
+int hw_uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
 {
     /* do basic initialization */
-    int res = init_base(uart, baudrate);
+    int res = hw_init_base(uart, baudrate);
 
     if (res < 0) {
         return res;
@@ -95,7 +96,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
     return 0;
 }
 
-static int init_base(uart_t uart, uint32_t baudrate)
+static int hw_init_base(uart_t uart, uint32_t baudrate)
 {
     KINETIS_UART *dev;
     PORT_Type *port;
@@ -182,7 +183,7 @@ static int init_base(uart_t uart, uint32_t baudrate)
     return 0;
 }
 
-void uart_write(uart_t uart, const uint8_t *data, size_t len)
+void hw_uart_write(uart_t uart, const uint8_t *data, size_t len)
 {
     KINETIS_UART *dev;
 
@@ -253,3 +254,36 @@ void UART_1_ISR(void)
     irq_handler(UART_1, UART_1_DEV);
 }
 #endif
+
+#if UART_0_EN
+uartdev_ops_t kinetis_uart0_ops = {
+    .dev = UART_0,
+    .uart_init = hw_uart_init,
+    .uart_write = hw_uart_write,
+    .uart_poweron = NULL,
+    .uart_poweroff = NULL,
+};
+#endif
+
+#if UART_1_EN
+uartdev_ops_t kinetis_uart1_ops = {
+    .dev = UART_1,
+    .uart_init = hw_uart_init,
+    .uart_write = hw_uart_write,
+    .uart_poweron = NULL,
+    .uart_poweroff = NULL,
+};
+#endif
+
+int kinetis_uart_init (void)
+{
+#if UART_0_EN
+    uartdev_register_driver(&kinetis_uart0_ops);
+#endif
+#if UART_1_EN
+    uartdev_register_driver(&kinetis_uart1_ops);
+#endif
+    return 0;
+}
+
+driver_init(kinetis_uart_init);