Optimize the performance of quick_allreduce#1816
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valarLip
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Motivation
In the kernel, the calculation of offsets involves prolonged local HBM access.
Technical Details
The communication temporary buffer address of the peer GPU is stored in HBM. This address is constant and frequently accessed by each thread, so it is loaded into VGPRs at the beginning of the kernel.
Test Plan
Test Result
Dtype: bfloat16
Cudagraph: on
Device: Mi325 * 8
Submission Checklist