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RealFYang committed Dec 15, 2024
1 parent 7d15fd6 commit 6a874bf
Showing 1 changed file with 5 additions and 10 deletions.
15 changes: 5 additions & 10 deletions src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
Original file line number Diff line number Diff line change
@@ -5854,21 +5854,15 @@ void MacroAssembler::zext(Register dst, Register src, int bits) {
}
break;
case 8:
if (UseZbb) {
zext_b(dst, src);
return;
}
zext_b(dst, src);
return;
break;
default:
break;
}

if (bits == 8) {
andi(dst, src, 0xFF);
} else {
slli(dst, src, XLEN - bits);
srli(dst, dst, XLEN - bits);
}
slli(dst, src, XLEN - bits);
srli(dst, dst, XLEN - bits);
}

void MacroAssembler::sext(Register dst, Register src, int bits) {
@@ -5891,6 +5885,7 @@ void MacroAssembler::sext(Register dst, Register src, int bits) {
default:
break;
}

slli(dst, src, XLEN - bits);
srai(dst, dst, XLEN - bits);
}

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