MPX fix.

Basic Live View.html

@@ -128,7 +128,7 @@
       <h1>
         Full X86 Disassembler by Damian Recoskie.
       </h1>
-      <h4>Version 2.0 Beta.</h4>
+      <h4>Version 2.</h4>
     </center>
     <form>
       <table border="1px" width="100%">

DisassembleX86-64.js

@@ -1279,12 +1279,12 @@ const Operands = [
   [["0601","0601","0601","0601","","","",""],""],
   "",
   [
-    [["0A0B0708","","",""],["0A0B060B","","",""],["0A0B0708","","",""],["0A0B0708","","",""]],
+    [["0A0B07080110","","",""],["0A0B07100110","","",""],["0A0B07080110","","",""],["0A0B07080110","","",""]],
     ["",["0A0B060B","","",""],["0A0B07080110","","",""],["0A0B07080110","","",""]]
   ],
   [
-    [["07080A0B","","",""],["060B0A0B","","",""],["0A0B0708","","",""],["0A0B0708","","",""]],
-    ["",["060B0A0B","","",""],"",["0A0B07080110","","",""]]
+    [["07080A0B0110","","",""],["07100A0B0110","","",""],["0A0B07080110","","",""],["0A0B07080110","","",""]],
+    ["",["0A0B060B","","",""],"",["0A0B07080110","","",""]]
   ],
   "","","",
   "070E",
@@ -3306,6 +3306,7 @@ and the higher four bits is the selected register.
 
 function Decode_ModRM_SIB_Address( ModRM, BySize, Setting )
 {
+
   var out = ""; //the variable out is what stores the decoded address pointer, or Register if Register mode.
 
   //-------------------------------------------------------------------------------------------------------------------------
@@ -3326,9 +3327,18 @@ function Decode_ModRM_SIB_Address( ModRM, BySize, Setting )
     //The Selected Size is setting unless BySize attribute is true.
     //-------------------------------------------------------------------------------------------------------------------------
 
-    if (BySize)
+    if ( BySize )
     {
-      Setting = ( GetOperandSize( Setting ) << 1 ) | FarPointer;
+      if ( Setting !== 16 || Vect )
+      {
+        Setting = ( GetOperandSize( Setting ) << 1 ) | FarPointer;
+      }
+
+      //-------------------------------------------------------------------------------------------------------------------------
+      //Non vectorized 128 uses Oword ptr aliases to QWord in 32 bit mode, or lower.
+      //-------------------------------------------------------------------------------------------------------------------------
+
+      else if ( !Vect ) { Setting = 11 - ( ( BitMode <= 1 ) * 5 ); }
     }
 
     //-------------------------------------------------------------------------------------------------------------------------

README.md

@@ -4,18 +4,19 @@ X86 Disassembler.
 This disassembler is mainly designed as an X86 Disassembly library for JavaScript that can run on any system.
 Supports decoding 64 bit, and 32 bit programs, also is completely backwards compatible to 16 bit 8086.
 -----------------------------------------------------------------------------------------------
+
 Supports Instruction sets:<br />
 MMX.<br />
-SSE1,SSE2,SSE3,SSSE3,SSE4,SSE4a,SSE4.1,SSE4.2.<br />
-SMX,VMX,<br />AES,ADX,<br />HLE,MPX.<br />
+SSE, SSE2, SSE3, SSSE3, SSE4, SSE4a, SSE4.1, SSE4.2.<br />
+SMX, VMX, AMD-V, Intel VT-x.<br />
+AES, ADX.<br />
+HLE, MPX.<br />
+ABM, BMI1, BMI2, TBM.<br />
+FMA, SHA.<br />
 AVX2.<br />
-BMI1,BMI2,<br />
-FMA,FMA4,<br />
-SHA.<br />
-AVX512F,AVX512VL,<br />
-AVX512DQ,AVX512BW,AVX512CD,<br />
-AVX512ER,AVX512PF,<br />
-AVX512VBMI,AVX512IFMA.<br />
+AVX512F, AVX512CD, AVX512ER, AVX512PF.<br />
+AVX512BW, AVX512DQ, AVX512VL.<br />
+AVX512IFMA, AVX512VBMI.<br />
 
 This disassembler supports every instruction ever made for all Intel, and AMD X86 processors.
 -----------------------------------------------------------------------------------------------