Welcome to the ECE368 Lab Repository.
This repository contains setup instructions, VHDL examples, Lab assignments and the Final Project for ECE368. ECE368 is an Advanced Digital Design Course focusing on VHDL with a FPGA.
- Nexyx 2 Development Board
- ISE WebPack 14.7
- Group with a classmate(2-3 per group)
The lab code that was provided for each lab is designed as a learning mechanism. The code has issue's on purpose and its up to you to find the issues. Solution for the code for each lab will be handed out upon request after the completion of the lab assignment.
The course will focus primary on Digilent's Nexys™2 Spartan-3E FPGA Board as a learning tool.
The course will use Xilinx's 14.7 ISE WebPack Edition. The webpack edition is free to download and use. But first you have to register on their site to download it and obtain a webpack license.
Lab# | Topic | Course Date | Due Date |
---|---|---|---|
[1](Lab 1/Lab1.pdf) | Intro | 2016-01-29 | 2016-02-12 |
[2](Lab 2/Lab2.pdf) | Input | 2016-02-12 | 2016-02-19 |
[3](Lab 3/Lab3.pdf) | Output | 2016-02-19 | 2016-02-26 |
[4](Lab 4/Lab4.pdf) | Debug | 2016-02-26, 2016-03-04 | 2016-03-11 |
Part# | Topic | Course Date | Due Date |
---|---|---|---|
[1](Project Lab 1/ProjectLab1.pdf) | Control Path, Data Path | 2016-03-11, 2016-03-25 | 2016-04-01 |
[2](Project Lab 2/ProjectLab2.pdf) | Branch, Jump Link, Return, Interrupt | 2016-04-01, 2016-04-08 | 2016-04-15 |
[3](Project Lab 3/ProjectLab3.pdf) | Finalization of RISC | 2016-04-15, 2016-04-22 | 2016-05-06 |
This Git Repo uses git-lfs to maintain large binary files. To download the entire repo first install git-lfs and run git clone [repo]
. It is recomend to run git lfs pull
after you git clone to Fetch LFS changes in the repo and show the contents properly.
- Daniel Noyes
- VHDL-Emporium: Collection of VHDL code for example.
The course material presented are available under the MIT License.