VSDSquadron Research Internship 2024

The program is based on the RISC-V architecture and uses open-source tools to teach people about VLSI chip design and RISC-V. The instructor for this internship is Kunal Ghosh Sir.

Basic Details

Name: Prawin Kumar J S
College: RajaLakshmi Institute of Technology, Chennai

Email ID: prawink554@gmail.com
GitHub Profile: prawinkumarjs
LinkedIN Profile: prawin-kumar-j-s

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Task 1:

Installation of RISC-V toolchain using VDI. Uploading the snapshot of compiled C code and RISC-V Objdmp on the GitHub repo

The task 1 of the internship includes the following

• Installation of RISC-V toolchain using VDI.
• C Program for sum from one to n.
• Checking the result of C code
• RISC-V Simulator for compiling and running the code
• Assembly language

Overall, it is about writing the C code for sum from one to n followed by compiling and running by RISC-V Simulator.

The steps to be followed are:

Step 1: Installation of Oracle VirtualBox.

The VirtualBox is an open source software and an operating system which runs as a physical computer inside the pc/laptop.

Step 2: Open the terminal inside the VirtualBox

Step 3: To open the editor named leafpad for writing C code.

Note for the above command explanation:

• command line cd is to check for home directory.
• leafpad to open editor.
• sum_one_to_one is the file name for C code to be written in editor.

Step 4: Write the C program for sum of one to n in the terminal

The leafpad editor opened, write the simple c code for sum of 1 to n,

Save the file in the editor

Step 5: To check the result of C code

• Type the below command line to ensure the file is saved.

• This ./a.out command will generate the output

• The sum for 1 to 5 is 15 which is also verified using calculator

Step 6: Compile and run the C code using RISC-V Simulator

• Compile the code with RISC-V compiler by using the command line

• Run the C code by RISC-V Simulator using below

Step 7: Assembly code

• Command line for generating the assembly code is:

• The Assembly codes:

• After that type out this line;

Step 8: Search the main()

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Task2:

Performing SPIKE Simulation and Debugging a simple C code with Interactive Debugging Mode using Spike

What is SPIKE in RISCV?

• A RISC-V ISA is a simulator, enabling the testing and analysis of RISC-V programs without the need for actual hardware.
• Spike is a free, open-source C++ simulator for the RISC-V ISA that models a RISC-V core and cache system. It can be used to run programs and a Linux kernel, and can be a starting point for running software on a RISC-V target.

What is pk (Proxy Kernel)?

• The RISC-V Proxy Kernel, pk , is a lightweight application execution environment that can host statically-linked RISC-V ELF binaries.
• A Proxy Kernel in the RISC-V ecosystem simplifies the interaction between complex hardware and the software running on it, making it easier to manage, test, and develop software and hardware projects.

Testing the SPIKE Simulator

The target is to run the sum1ton.c code using both gcc compiler and riscv compiler, and both of the compiler must display the same output on the terminal. So to compile the code using gcc compiler, use the following command:

gcc sum1ton.c  
./a.out

And to compile the code using riscv compiler, use the following command:

spike pk sum1ton.o

Following are the snapshots of RISCV Objdump with -O1 and -Ofast options

RISCV Objdump with -O1 option

RISCV Objdump with -Ofast option

Debugging the Assembly Language Program of sum1ton.c

• Open the Objdump of code by using the following command

$ riscv64-unknown-elf-objdump -d sum1ton.o | less  

• Open the debugger in another terminal by using the following command

$ spike -d pk sum1ton.o

• The debugger will be opened in the terminal. Now, debugging operations can be performed as shown in the following snapshot.

================================================================================================================

Digital Design Application - RISC-V Simple Counter Program

This repository contains a simple RISC-V counter program written in C. Follow the instructions below to set up, build, and run the program using the RISC-V toolchain, Spike simulator, and proxy kernel (pk).

Prerequisites

• RISC-V Toolchain: For compiling RISC-V code.
• Spike Simulator: To run RISC-V binaries.
• Proxy Kernel (pk): Provides a runtime environment for running RISC-V binaries.

Step-by-Step Instructions

1. Clone the Repository

Clone this repository to your local machine:

git clone https://github.com/Prawinkumarjs/VSDSquadron-mini-internship.git
cd VSDSquadron-mini-internship

2. Install the RISC-V Toolchain

Follow the installation instructions for your platform. For example, on Ubuntu:

sudo apt-get update
sudo apt-get install gcc-riscv64-linux-gnu

3. Install Spike and pk

Follow the installation instructions for Spike and pk. Example installation for Spike:

# Clone Spike repository
git clone https://github.com/riscv/riscv-isa-sim.git
cd riscv-isa-sim
mkdir build
cd build
../configure --prefix=/opt/riscv
make
make install

For pk:

# Clone pk repository
git clone https://github.com/riscv/riscv-pk.git
cd riscv-pk
mkdir build
cd build
../configure --prefix=/opt/riscv
make
make install

Ensure /opt/riscv/bin is in your PATH.

4. Create the Source File

Create the simplecounter.c source file using Leafpad:

leafpad simplecounter.c

In Leafpad, enter the following code:

#include <stdio.h>
#include <unistd.h>  // For usleep() in POSIX systems

int main() {
    int counter = 0;
    int end_value = 10;  // Set the end value

    printf("Simple Digital Counter\n");

    while (counter <= end_value) {  // Loop until counter reaches end value
        printf("Counter: %d\n", counter);
        counter++;  // Increment the counter
        usleep(1000000);  // Wait for 1 second (1,000,000 microseconds)
    }

    printf("Counter reached the end value of %d. Stopping.\n", end_value);

    return 0;
}

Save and close Leafpad.

5. Compile the Program

Compile and link the source code into an executable:

    riscv64-unknown-elf-gcc -O1 -mabi=lp64 -march=rv64i -o simplecounter simplecounter.c

6. View the Object File (Optional)

If you need to view the object file, first compile to object file:

    riscv64-unknown-elf-gcc -O1 -mabi=lp64 -march=rv64i -c simplecounter.c -o simplecounter.o

To view the object file, use:

   riscv64-unknown-elf-objdump -d simplecounter.o

7. Run the Program

To execute the compiled program with Spike and pk, use:

   spike pk simplecounter

8. Debug the Program (Optional)

For detailed debugging output, run:

    spike -d pk simplecounter

9. View the File Content (Optional)

To view the content of the source file or object file, use cat:

   cat simplecounter.c

    cat simplecounter.o

Example Output

When running the program, you should see:

Simple Digital Counter
Counter: 0
Counter: 1
Counter: 2
Counter: 3
Counter: 4
Counter: 5
Counter: 6
Counter: 7
Counter: 8
Counter: 9
Counter: 10
Counter reached the end value of 10. Stopping.

Troubleshooting

• Compilation Issues: Ensure the RISC-V toolchain is properly installed and configured.
• Execution Issues: Verify that spike and pk are correctly installed and accessible in your PATH.
• Path Problems: Ensure that all necessary binaries (e.g., spike, pk) are in your system’s PATH, or provide full paths to these executables.

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Task 3:

RISC-V Instruction Types & 32-Bit Instruction Code

The RISC-V instruction set architecture (ISA) defines several types of instructions, each with a specific format. Below is a summary of the main instruction types:

R-Type (Register-Register)

• Purpose: Used for operations that involve two source registers and one destination register.

• Fields:

  • opcode: Operation code
  • rd: Destination register
  • func3: Function modifier
  • rs1: Source register 1
  • rs2: Source register 2
  • func7: Function modifier (additional)

• Example: add x1, x2, x3

I-Type (Immediate)

• Purpose: Used for operations with one source register and an immediate value, including loads.

• Fields:

  • opcode: Operation code
  • rd: Destination register
  • func3: Function modifier
  • rs1: Source register
  • imm[11:0]: Immediate value

• Example: addi x1, x2, 10

S-Type (Store)

• Purpose: Used for store instructions, which write a register's value to memory.

• Fields:

  • opcode: Operation code
  • imm[11:5]: Immediate value (upper 7 bits)
  • func3: Function modifier
  • rs1: Source register (base address)
  • rs2: Source register (data to store)
  • imm[4:0]: Immediate value (lower 5 bits)

• Example: sw x2, 0(x1)

B-Type (Branch)

• Purpose: Used for conditional branch instructions.

• Fields:

  • opcode: Operation code
  • imm[12]: Immediate value (bit 12)
  • imm[10:5]: Immediate value (bits 10 to 5)
  • func3: Function modifier
  • rs1: Source register 1
  • rs2: Source register 2
  • imm[4:1]: Immediate value (bits 4 to 1)
  • imm[11]: Immediate value (bit 11)

• Example: beq x1, x2, label

U-Type (Upper Immediate)

• Purpose: Used for instructions that operate with a large immediate value.

• Fields:

  • opcode: Operation code
  • rd: Destination register
  • imm[31:12]: Immediate value

• Example: lui x1, 0x10000

J-Type (Jump)

• Purpose: Used for jump instructions with a large immediate value.

• Fields:

  • opcode: Operation code
  • rd: Destination register
  • imm[20]: Immediate value (bit 20)
  • imm[10:1]: Immediate value (bits 10 to 1)
  • imm[11]: Immediate value (bit 11)
  • imm[19:12]: Immediate value (bits 19 to 12)

• Example: jal x1, label

32-bit Instruction Codes in RISC-V Instruction Type Format

1. addi x1, x2, 10

   • Instruction Format: I-type
   • Binary Encoding: 000000000010 00010 000 00001 0010011
   • 32-bit Instruction Code: 0x00210093

2. li x5, 0x0

   • Instruction Format: I-type (using addi x5, x0, 0x0)
   • Binary Encoding: 000000000000 00000 000 00101 0010011
   • 32-bit Instruction Code: 0x00000293

3. lui x10, 0x20000

   • Instruction Format: U-type
   • Binary Encoding: 00100000000000000000 01010 0110111
   • 32-bit Instruction Code: 0x20000537

4. mv x1, x2

   • Instruction Format: I-type (using addi x1, x2, 0)
   • Binary Encoding: 000000000000 00010 000 00001 0010011
   • 32-bit Instruction Code: 0x00010093

5. sw x5, 0(x10)

   • Instruction Format: S-type
   • Binary Encoding: 0000000 00101 01010 010 00000 0100011
   • 32-bit Instruction Code: 0x0050a023

6. lw x5, 0(x10)

   • Instruction Format: I-type
   • Binary Encoding: 000000000000 01010 010 00101 0000011
   • 32-bit Instruction Code: 0x0000a283

7. jal x0, 0x100

   • Instruction Format: J-type
   • Binary Encoding: 00000000000100000000 00000 1101111
   • 32-bit Instruction Code: 0x0000086f

8. beq x1, x2, label

   • Instruction Format: B-type (assuming offset is 0x4)
   • Binary Encoding: 000000 00010 00001 000 00010 1100011
   • 32-bit Instruction Code: 0x00210063

9. bne x1, x3, label

   • Instruction Format: B-type (assuming offset is 0x4)
   • Binary Encoding: 000000 00011 00001 001 00010 1100011
   • 32-bit Instruction Code: 0x00310063

10. slli x5, x1, 1

    • Instruction Format: I-type
    • Binary Encoding: 0000000 00001 00101 001 00001 0010011
    • 32-bit Instruction Code: 0x00109093

11. srli x6, x2, 2

    • Instruction Format: I-type
    • Binary Encoding: 0000000 00010 00110 101 00010 0010011
    • 32-bit Instruction Code: 0x0022b093

12. and x3, x4, x5

    • Instruction Format: R-type
    • Binary Encoding: 0000000 00101 00100 111 00011 0110011
    • 32-bit Instruction Code: 0x005201b3

13. or x2, x3, x4

    • Instruction Format: R-type
    • Binary Encoding: 0000000 00100 00011 110 00010 0110011
    • 32-bit Instruction Code: 0x004181b3

14. sub x3, x5, x2

    • Instruction Format: R-type
    • Binary Encoding: 0100000 00010 00101 000 00011 0110011
    • 32-bit Instruction Code: 0x402282b3

15. xor x1, x2, x3

    • Instruction Format: R-type
    • Binary Encoding: 0000000 00011 00010 100 00001 0110011
    • 32-bit Instruction Code: 0x003100b3

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Task 4:

By making use of RISC-V Core: Verilog Netlist and Testbench, perform an experiment of Functional Simulation and observe the waveforms

NOTE: Since the designing of RISCV Architecture and writing it's testbench is not the part of this Research Internship, so we will use the Verilog Code and Testbench of RISCV that has already been designed. The reference GitHub repository is : iiitb_rv32i

Steps to perform functional simulation of RISCV

GTKWAVE Generation Process

Follow the steps below to generate the waveform using Verilog code and GTKWAVE.

Step 1: Clone the Repository

Clone the RISC-V Verilog repository using the git clone command.

git clone https://github.com/vinayrayapati/rv321

Step 2: Navigate to the Cloned Directory

Change the directory to the cloned repository.

cd rv321

Step 3: Compile the Verilog Code and Testbench

Run the following iverilog command to compile the Verilog code and testbench.

iverilog -o iiitb_rv32i iiitb_rv32i.v iiitb_rv32i_tb.v

Step 4: Simulate the Verilog Code

After compiling, simulate the Verilog code by running the compiled file:

./iiitb_rv321

Step 5: Open the Waveform in GTKWAVE

Once the simulation generates the .vcd (Value Change Dump) file, you can visualize the waveform in GTKWAVE.

gtkwave iiitb_rv321.vcd

It will open the new window of GTKWAVE

Tap the iiitb_rv32i_tb in the SST section

Now, drag the command in the same way presented under time section.

Select the instructions from EX_MEM_IR[31:0] to present the instructions used in Task 3 and Analysing the Output Waveform of various instructions that we have covered in TASK-3.

Instruction ADD r1, r2, r3 :

Instruction SUB r3, r1, r2 :

Instruction AND r2, r1, r3 :

Instruction OR r8, r2, r5 :

Instruction XOR r8, r1, r4 :

Instruction SLL r15, r11, r2 :

Instruction SLT r10, r2, r4 :

To conclude : The output waveform for the list of instructions are obtained in GTKWAVE.

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Task 5 :

Gas Detection System Using VSDSquadron Mini RISC-V Development Board

Project Overview:

This project implements a gas detection system using the VSDSquadron Mini board, a RISC-V based SoC development kit. The gas detection system will monitor the air for dangerous gases using a gas sensor. When gas levels exceed a set threshold, a LED indicator or buzzer is activated to alert the user. This project demonstrates reading analog data from a sensor and controlling GPIO pins using digital logic, which is simulated and built using Arduino IDE.

Components Required:

1. VSDSquadron Mini RISC-V board
2. MQ-series gas sensor (e.g., MQ-2 or MQ-135)
3. 1 LED (or buzzer)
4. Resistors (as needed based on the sensor)
5. Breadboard and jumper wires
6. Arduino IDE for development

Hardware Connections:

• Gas Sensor:

• VCC to 5V pin of VSDSquadron Mini

• GND to GND pin of VSDSquadron Mini

• AO (Analog Output) to PC4 (analog input pin)

• LED:

  • Positive (Anode) to PD6
  • Negative (Cathode) to GND

Circuit Connection:

MQ Gas Sensor       VSDSquadron Mini
   VCC  -------->  5V
   GND  -------->  GND
   AO   -------->  PC4 (Analog Input)

LED               VSDSquadron Mini
   +    -------->  PD6 (GPIO Pin for alert)
   -    -------->  GND

Project Image:

Truth Table:

For simplicity, this system uses the gas sensor output and a threshold value to determine when to trigger the LED:

Gas Sensor Value	LED Status (Alert)
Below Threshold	Off
Above Threshold	On

Pin Diagram for Gas Detection System Using VSDSquadron Mini RISC-V Development Board:

Program:

#include <Arduino.h> // Using Arduino-style syntax

// Define the pin for the gas sensor and buzzer/LED
#define GAS_SENSOR_PIN PC4   // Analog input pin (adjusted to PC4)
#define ALERT_PIN PD6        // Pin for buzzer or LED

// Threshold for gas detection (adjust based on calibration)
#define GAS_THRESHOLD 300

void setup() {
  // Initialize the serial monitor for debugging
   Serial.begin(9600);

   // Set the ALERT_PIN as output
   pinMode(ALERT_PIN, OUTPUT);

   // Initialize the gas sensor pin (optional since it is analog)
   pinMode(GAS_SENSOR_PIN, INPUT);

   Serial.println("Gas detection system initialized...");
}

void loop() {
   // Read the analog value from the gas sensor
   int gasSensorValue = analogRead(GAS_SENSOR_PIN);

   // Debugging: Print the gas sensor value
   Serial.print("Gas Sensor Value: ");
   Serial.println(gasSensorValue);

   // Check if the gas level exceeds the threshold
   if (gasSensorValue > GAS_THRESHOLD) {
      // If gas is detected, activate the alert (buzzer or LED)
      digitalWrite(ALERT_PIN, HIGH);
      Serial.println("Gas Detected! Activating alert...");
      } 
   else {
         // Otherwise, turn off the alert
         digitalWrite(ALERT_PIN, LOW);
   }

   // Small delay to prevent overwhelming the serial output
   delay(500);
   }

Conclusion:

This project demonstrates the integration of an MQ gas sensor with the VSDSquadron Mini board to detect gases and alert the user through an LED indicator. This setup showcases how the RISC-V architecture and embedded systems handle real-world sensor data and control outputs in a practical application.

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Task 6 :

Demonstration of Project

Gas Detection System Using VSDSquadron Mini RISC-V Development Board

Project Overview:

This project implements a gas detection system using the VSDSquadron Mini board, a RISC-V based SoC development kit. The gas detection system will monitor the air for dangerous gases using a gas sensor. When gas levels exceed a set threshold, a LED indicator or buzzer is activated to alert the user. This project demonstrates reading analog data from a sensor and controlling GPIO pins using digital logic, which is simulated and built using Arduino IDE.

Hardware Connections:

• Gas Sensor:

• VCC to 5V pin of VSDSquadron Mini

• GND to GND pin of VSDSquadron Mini

• AO (Analog Output) to PC4 (analog input pin)

• LED:

  • Positive (Anode) to PD6
  • Negative (Cathode) to GND

Circuit Connection:

MQ Gas Sensor       VSDSquadron Mini
   VCC  -------->  5V
   GND  -------->  GND
   AO   -------->  PC4 (Analog Input)

LED               VSDSquadron Mini
   +    -------->  PD6 (GPIO Pin for alert)
   -    -------->  GND

Truth Table:

For simplicity, this system uses the gas sensor output and a threshold value to determine when to trigger the LED:

Gas Sensor Value	LED Status (Alert)
Below Threshold	Off
Above Threshold	On

Pin Diagram for Gas Detection System Using VSDSquadron Mini RISC-V Development Board:

Project Image:

Project Video:

Gas Detection System Using VSDSquadron Mini RISC-V Development Board Video

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Acknowledgment

I would like to express my special thanking to my mentor Kunal Ghosh, and sincere gratitude to Vlsi System Design for providing me with the opportunity to intern remotely with their team. This internship has been an invaluable experience, allowing me to delve deep into embedded systems, RISC-V architecture, and VLSI design under the guidance of dedicated mentors.

I am thankful for the support and knowledge imparted to me during this journey. It has significantly enhanced my technical skills and prepared me for future challenges in the field of digital design. I look forward to applying the lessons learned here in my continued pursuit of excellence in engineering.