C-Verilog_NTT_RNS_Polymultiplier

C++ and Verilog Hardware design of a flexible FPGA/C++ NTT modular polynomial multiplication unit for large latttice and FHE ring moduli. Utilizing Number Theoretic Transform module (NTT), a parameterizable Residue Number System (RNS), RNS Montgomery reduction with Bajard and Shenoy base extensions, and hardware optimized modular addition/subtraction/barrett multiplication for each RNS channel.