my files

[DantePrins]

verification runs into a code error I was not able to make go away, even when using a layout that was already integrated.

[lukasc-ubc]

disconnected waveguide.

I fixed the verification script error

[lukasc-ubc]

The verification is running now, and shows some errors in your designs.

from the DFT.md file:

• opt_in label location: at the chip edge (0,0) of the FaML cell, at the laser input

There are some overlapping components, and disconnected waveguides.

@DantePrins

[lukasc-ubc]

I don't see how we can fit your numerous designs! Look how full the chip is.

[lukasc-ubc]

Also the designs are missing FloorPlan layers.