sync with lx2160a_build

- fix spi3 chipselect when booting from SD-Card / eorkaround A-050752
- flush i2c bus for spd eeprom during each boot
- fix boot without spi flash assembled
- support S5 (power-off gpio)
- support large pcie bars (> 1GB)
- enable amdgpu driver
- add support for internal cex6 evaluation board

README.md

@@ -122,6 +122,20 @@ Bus clock can be configured in local.conf using `LX2160A_BUS_SPEED`, supported v
 - `700` only for LX2160A binned 2GHz and higher (default)
 - `750` (for over-clocking, or for specifically purchased 2.2GHz binned SoC)
 
+### MC DPC & DPL
+
+Management Complex configuration can be configured in local.conf using `MC_FLAVOUR`, `MC_DPC` and `MC_DPL` variables, supported values are:
+
+- `MC_FLAVOUR=CEX6`:
+
+   - `MC_DPC=evb-s1_3-s2_0-dpc.dtb MC_DPL=evb-s1_3-s2_0-dpl.dtb`
+
+- `MC_FLAVOUR=CEX7`:
+
+   - `MC_DPC=clearfog-cx-s1_8-s2_0-dpc.dtb MC_DPL=clearfog-cx-s1_8-s2_0-dpl.dtb`
+
+Additional configurations are added by patching `mc-utils` package and adding files at `LX2160A-<MC_FLAVOUR>/`.
+
 ## Known Issues
 
 ## Failed to spawn fakeroot worker: [Errno 32] Broken pipe

conf/machine/lx2160acex6-rev2.conf

@@ -0,0 +1,56 @@
+#@TYPE: Machine
+#@NAME: SolidRun LX2160ACEX6 EVB
+#@SOC: LSCH3
+#@DESCRIPTION: Machine configuration for SolidRun LX2160A Rev 2.0 Com-Express Type 6 Internal Evaluation Board
+
+require conf/machine/include/qoriq-arm64.inc
+require conf/machine/include/arm/arch-arm64.inc
+
+MACHINEOVERRIDES =. "fsl-lsch3:lx2160a:"
+
+MACHINE_FEATURES:append = " optee "
+
+KERNEL_CLASSES  = " kernel-fitimage "
+KERNEL_IMAGETYPES = "fitImage"
+
+DTB_LOAD = "0x90000000"
+UBOOT_ENTRYPOINT = "0x80080000"
+
+UBOOT_CONFIG ??= "tfa-secure-boot tfa"
+UBOOT_CONFIG[tfa] = "lx2160acex7_tfa_defconfig,,u-boot-dtb.bin"
+UBOOT_CONFIG[tfa-secure-boot] = "lx2160ardb_tfa_SECURE_BOOT_defconfig,,u-boot-dtb.bin"
+
+KERNEL_DEVICETREE ?= " \
+	freescale/fsl-lx2160a-cex6-evb.dtb \
+"
+KERNEL_DEFCONFIG ?= "defconfig"
+
+SERIAL_CONSOLES ?= "115200;ttyS0 115200;ttyS1 115200;ttyAMA0"
+SERIAL_CONSOLES_CHECK ?= "${SERIAL_CONSOLES}"
+
+LX2160A_BUS_SPEED ?= "700"
+LX2160A_CPU_SPEED ?= "2000"
+LX2160A_DDR_SPEED ?= "2900"
+
+UEFI_XSPIBOOT ?= "LX2160ARDB_EFI_NORBOOT.fd"
+BOOTTYPE ?= "auto"
+RCWAUTO ?= "evb/rcw_${LX2160A_CPU_SPEED}_${LX2160A_BUS_SPEED}_${LX2160A_DDR_SPEED}_3_3_2_auto"
+
+EXTRA_IMAGEDEPENDS += "management-complex mc-utils rcw ls2-phy ddr-phy uefi qoriq-atf inphi"
+USE_VT = "0"
+
+# install the vendor-prefixed dtbs
+# Note: must keep the non-prefixed versions in place,
+# to ensure bootimg-partition.py does not mess with extlinux.conf fdtdir
+IMAGE_BOOT_FILES:append = "${KERNEL_DEVICETREE}"
+
+# select DPL/DPC source (config/lx2160a/LX2160A-<MC_FLAVOUR>)
+MC_FLAVOUR ?= "CEX6"
+
+# select DPL/DPC (config/lx2160a/LX2160A-<MC_FLAVOUR>/<DPL/DPC>)
+# variable consumed in wks files
+MC_DPC ?= "evb-s1_3-s2_0-dpc.dtb"
+MC_DPL ?= "evb-s1_3-s2_0-dpl.dtb"
+
+# select rev2 rcw
+RCW_FOLDER ?= "lx2160acex6_rev2"

conf/machine/lx2160acex7.conf

@@ -8,7 +8,7 @@ require conf/machine/include/arm/arch-arm64.inc
 
 MACHINEOVERRIDES =. "fsl-lsch3:lx2160a:"
 
-MACHINE_FEATURES += "optee"
+MACHINE_FEATURES:append = " optee "
 
 KERNEL_CLASSES  = " kernel-fitimage "
 KERNEL_IMAGETYPES = "fitImage"
@@ -48,5 +48,10 @@ USE_VT = "0"
 # to ensure bootimg-partition.py does not mess with extlinux.conf fdtdir
 IMAGE_BOOT_FILES:append = "${KERNEL_DEVICETREE}"
 
-# select DPL/DPC source (config/lx2160a/LX2160A-CEX7)
+# select DPL/DPC source (config/lx2160a/LX2160A-<MC_FLAVOUR>)
 MC_FLAVOUR ?= "CEX7"
+
+# select DPL/DPC (config/lx2160a/LX2160A-<MC_FLAVOUR>/<DPL/DPC>)
+# variable consumed in wks files
+MC_DPC ?= "clearfog-cx-s1_8-s2_0-dpc.dtb"
+MC_DPL ?= "clearfog-cx-s1_8-s2_0-dpl.dtb"

recipes-bsp/atf/qoriq-atf-2.6/0003-lx2160acex7-assert-SUS_S5-GPIO-to-poweroff-the-COM.patch

@@ -0,0 +1,29 @@
+From 72557b712198e3292776fbe8697322c68583acf4 Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Sun, 28 Nov 2021 13:33:10 +0200
+Subject: [PATCH] lx2160acex7: assert SUS_S5# GPIO to poweroff the COM
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ plat/nxp/soc-lx2160a/aarch64/lx2160a.S | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/plat/nxp/soc-lx2160a/aarch64/lx2160a.S b/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
+index cc679f2ba..01b3c7ecd 100644
+--- a/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
++++ b/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
+@@ -563,6 +563,11 @@ endfunc _soc_sys_reset
+  */
+ func _soc_sys_off
+
++	/* assert GPIO3[7] (IRQ07 - CEX-7 SUS_S5) */
++	mov x3, #NXP_GPIO3_ADDR
++	mov w1, #0x01000000
++	str w1, [x3]
++
+ 	/* disable sec, QBman, spi and qspi */
+ 	ldr  x2, =NXP_DCFG_ADDR
+ 	ldr  x0, =DCFG_DEVDISR1_OFFSET
+-- 
+2.43.0
+

recipes-bsp/atf/qoriq-atf-2.6/0004-lx2160acex6-assert-IRQ0-GPIO-to-poweroff-the-EVB.patch

@@ -0,0 +1,29 @@
+From 6bc7cf0b6de6427b230d47ae7ee273175ffe95dd Mon Sep 17 00:00:00 2001
+From: Josua Mayer <josua@solid-run.com>
+Date: Mon, 14 Oct 2024 11:55:03 +0200
+Subject: [PATCH] lx2160acex6: assert IRQ0 GPIO to poweroff the EVB
+
+Signed-off-by: Josua Mayer <josua@solid-run.com>
+---
+ plat/nxp/soc-lx2160a/aarch64/lx2160a.S | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/plat/nxp/soc-lx2160a/aarch64/lx2160a.S b/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
+index 01b3c7ecd..8035b145e 100644
+--- a/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
++++ b/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
+@@ -563,9 +563,9 @@ endfunc _soc_sys_reset
+  */
+ func _soc_sys_off
+
+-	/* assert GPIO3[7] (IRQ07 - CEX-7 SUS_S5) */
++	/* assert GPIO3[7] (IRQ07 - CEX-7 SUS_S5), GPIO3[0] (IRQ00 - CEX-6 EVB IRQ0) */
+ 	mov x3, #NXP_GPIO3_ADDR
+-	mov w1, #0x01000000
++	mov w1, #0x81000000
+ 	str w1, [x3]
+
+ 	/* disable sec, QBman, spi and qspi */
+-- 
+2.43.0
+

recipes-bsp/atf/qoriq-atf-2.6/0005-lx2160a-assert-optional-S5-gpio-from-Makefile-consta.patch

@@ -0,0 +1,63 @@
+From 13496d248f11fe09d5a634fe15dd6b507a520a87 Mon Sep 17 00:00:00 2001
+From: Josua Mayer <josua@solid-run.com>
+Date: Fri, 18 Oct 2024 21:09:04 +0200
+Subject: [PATCH 5/6] lx2160a: assert optional S5 gpio from Makefile constant
+
+GPIO address and number for S5 are specific per board and should not be
+set globally across lx2160.
+
+Add support for setting gpio address and number form platform.mk, into
+soc.mk:
+
+- LX2160A_S5_GPIO_ADDR: gpio value register address
+- LX2160A_S5_GPIO: gpio number
+
+This feature can be enabled for individual boards by setting a non-zero
+address in platform.mk file, before including soc.mk.
+
+Signed-off-by: Josua Mayer <josua@solid-run.com>
+---
+ plat/nxp/soc-lx2160a/aarch64/lx2160a.S | 9 ++++++---
+ plat/nxp/soc-lx2160a/soc.mk            | 8 ++++++++
+ 2 files changed, 14 insertions(+), 3 deletions(-)
+
+diff --git a/plat/nxp/soc-lx2160a/aarch64/lx2160a.S b/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
+index 8035b145e..67ade7b66 100644
+--- a/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
++++ b/plat/nxp/soc-lx2160a/aarch64/lx2160a.S
+@@ -563,10 +563,13 @@ endfunc _soc_sys_reset
+  */
+ func _soc_sys_off
+
+-	/* assert GPIO3[7] (IRQ07 - CEX-7 SUS_S5), GPIO3[0] (IRQ00 - CEX-6 EVB IRQ0) */
+-	mov x3, #NXP_GPIO3_ADDR
+-	mov w1, #0x81000000
++#if defined(CONFIG_LX2160A_S5_GPIO_ADDR) && defined(CONFIG_LX2160A_S5_GPIO)
++	/* assert s5 gpio */
++	mov x3, # CONFIG_LX2160A_S5_GPIO_ADDR
++	ldr w1, [x3]
++	orr w1, w1, # 1 << (31 - CONFIG_LX2160A_S5_GPIO)
+ 	str w1, [x3]
++#endif
+
+ 	/* disable sec, QBman, spi and qspi */
+ 	ldr  x2, =NXP_DCFG_ADDR
+diff --git a/plat/nxp/soc-lx2160a/soc.mk b/plat/nxp/soc-lx2160a/soc.mk
+index a72b4113d..20e64753c 100644
+--- a/plat/nxp/soc-lx2160a/soc.mk
++++ b/plat/nxp/soc-lx2160a/soc.mk
+@@ -177,3 +177,11 @@ include ${PLAT_PATH}/common/setup/common.mk
+
+  # Adding source files to generate separate DDR FIP image
+ include ${PLAT_SOC_PATH}/ddr_fip.mk
++
++# S5 GPIO (optional)
++LX2160A_S5_GPIO_ADDR ?= 0
++LX2160A_S5_GPIO ?= 0
++ifneq (${LX2160A_S5_GPIO_ADDR},0)
++$(eval $(call add_define_val,CONFIG_LX2160A_S5_GPIO_ADDR,$(LX2160A_S5_GPIO_ADDR)))
++$(eval $(call add_define_val,CONFIG_LX2160A_S5_GPIO,$(LX2160A_S5_GPIO)))
++endif
+-- 
+2.43.0
+