openlane add SYNTH_AUTONAME param to help with timeing analysis

SpinalHDL · Feb 5, 2024 · 79ea10e · 79ea10e
1 parent 4b6ae36
commit 79ea10e
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/src/main/openlane/nax/config.tcl b/src/main/openlane/nax/config.tcl
@@ -4,6 +4,7 @@ set ::env(VERILOG_FILES) [glob $::env(DESIGN_DIR)/src/*.v]
 set ::env(CLOCK_PORT) "clk"
 set ::env(CLOCK_PERIOD) "50.0"
 set ::env(DESIGN_IS_CORE) {1}
+set ::env(SYNTH_AUTONAME) {1}
 
 # If you use SRAM macro, uncomment this
 #set ::env(VERILOG_FILES_BLACKBOX) [glob $::env(DESIGN_DIR)/sram/*.v]