Skip to content

Commit

Permalink
mb86hxx: clk: usb reset
Browse files Browse the repository at this point in the history
  • Loading branch information
Spitzbube committed Oct 30, 2023
1 parent 0c3fc47 commit abf14c9
Show file tree
Hide file tree
Showing 3 changed files with 70 additions and 34 deletions.
14 changes: 14 additions & 0 deletions drivers/clk/fujitsu/clk-mb86hxx.c
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@

#include <dt-bindings/clock/mb86hxx-clock.h>
#include <linux/of_address.h>
#include <linux/clk-provider.h>
#include <linux/slab.h>

Expand Down Expand Up @@ -153,6 +154,7 @@ static struct clk_hw *mb86hxx_register_uart_clock(struct device_node *np)

static void __init mb86hxx_clk_init(struct device_node *np)
{
void __iomem *base;
int ret;

printk("mb86hxx_clk_init\n");
Expand All @@ -165,6 +167,18 @@ static void __init mb86hxx_clk_init(struct device_node *np)
clk_hw_data->num = MB86HXX_CLK_END;
hws = clk_hw_data->hws;

base = of_iomap(np, 0);
printk("mb86hxx_clk_init: base=0x%x\n", base);
{
/* FREG_CLKPWR_CONFIGDMACAUDIO */
u32 data = __raw_readl(base + 0x74);
printk("mb86hxx_clk_init: data=0x%x\n", data);
data &= ~((1 << 21) | (1 << 20) | (1 << 14) | (1 << 7));
__raw_writel(data, base + 0x74);
data |= ((1 << 21) | (1 << 20) | (1 << 14) | (1 << 7));
__raw_writel(data, base + 0x74);
}

hws[MB86HXX_APB_CLK] = mb86hxx_register_apb_clock(np);
hws[MB86HXX_UART_CLK] = mb86hxx_register_uart_clock(np);

Expand Down
77 changes: 53 additions & 24 deletions drivers/usb/musb/mb86hxx.c
Original file line number Diff line number Diff line change
Expand Up @@ -22,59 +22,67 @@ static u8 mb86hxx_musb_readb(void __iomem *addr, u32 offset)
{
u8 data;

#if 0
#if 1
usb_mode &= ~MB86HXX_USB_LENGTH_MASK;
__raw_writeb(MB86HXX_USB_1BYTE_ACCESS<<1 | usb_mode, MB86HXX_USB_MODE);
__raw_writel(MB86HXX_USB_1BYTE_ACCESS<<1 | usb_mode, MB86HXX_USB_MODE);
#endif

data = __raw_readb(addr + (offset<<2));
// data = __raw_readl(addr + (offset<<2));
data = ((volatile unsigned*)(addr))[offset];

printk("mb86hxx_musb_readb: offset=0x%02x, data=0x%02x\n", offset, data);
printk("mb86hxx_musb_readb: addr=0x%x, offset=0x%02x, data=0x%02x\n",
addr, offset, data);

return data;
}

static void mb86hxx_musb_writeb(void __iomem *addr, u32 offset, u8 data)
{
#if 0
#if 1
usb_mode &= ~MB86HXX_USB_LENGTH_MASK;
__raw_writeb(MB86HXX_USB_1BYTE_ACCESS<<1 | usb_mode, MB86HXX_USB_MODE);
__raw_writel(MB86HXX_USB_1BYTE_ACCESS<<1 | usb_mode, MB86HXX_USB_MODE);
#endif

printk("mb86hxx_musb_writeb: offset=0x%02x, data=0x%02x\n", offset, data);
printk("mb86hxx_musb_writeb: addr=0x%x, offset=0x%02x, data=0x%02x\n",
addr, offset, data);

__raw_writeb(data, addr + (offset<<2));
// __raw_writel(data, addr + (offset<<2));
((volatile unsigned*)(addr))[offset] = data;
}

static u16 mb86hxx_musb_readw(void __iomem *addr, u32 offset)
{
u16 data;

#if 0
#if 1
usb_mode &= ~MB86HXX_USB_LENGTH_MASK;
__raw_writeb(MB86HXX_USB_2BYTE_ACCESS<<1 | usb_mode, MB86HXX_USB_MODE);
__raw_writel(MB86HXX_USB_2BYTE_ACCESS<<1 | usb_mode, MB86HXX_USB_MODE);
#endif

data = __raw_readw(addr + (offset<<2));
// data = __raw_readl(addr + (offset<<2));
data = ((volatile unsigned*)(addr))[offset];

printk("mb86hxx_musb_readw: offset=0x%02x, data=0x%04x\n", offset, data);
printk("mb86hxx_musb_readw: addr=0x%x, offset=0x%02x, data=0x%04x\n",
addr, offset, data);

return data;
}

static void mb86hxx_musb_writew(void __iomem *addr, u32 offset, u16 data)
{
#if 0
#if 1
usb_mode &= ~MB86HXX_USB_LENGTH_MASK;
__raw_writeb(MB86HXX_USB_2BYTE_ACCESS<<1 | usb_mode, MB86HXX_USB_MODE);
__raw_writel(MB86HXX_USB_2BYTE_ACCESS<<1 | usb_mode, MB86HXX_USB_MODE);
#endif

printk("mb86hxx_musb_writew: offset=0x%02x, data=0x%04x\n", offset, data);
printk("mb86hxx_musb_writew: addr=0x%x, offset=0x%02x, data=0x%04x\n",
addr, offset, data);

__raw_writew(data, addr + (offset<<2));
// __raw_writel(data, addr + (offset<<2));
((volatile unsigned*)(addr))[offset] = data;
}

u8 mb86hxx_musb_clearb(void __iomem *addr, u32 offset)
static u8 mb86hxx_musb_clearb(void __iomem *addr, u32 offset)
{
u8 data;

Expand All @@ -87,7 +95,7 @@ u8 mb86hxx_musb_clearb(void __iomem *addr, u32 offset)
return data;
}

u16 mb86hxx_musb_clearw(void __iomem *addr, u32 offset)
static u16 mb86hxx_musb_clearw(void __iomem *addr, u32 offset)
{
u16 data;

Expand Down Expand Up @@ -119,31 +127,34 @@ static irqreturn_t mb86hxx_musb_interrupt(int irq, void *__hci)

if (musb->int_usb)
{
printk("mb86hxx_musb_interrupt: usb=0x%x\n", musb->int_usb);
musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
}

if (musb->int_tx)
{
printk("mb86hxx_musb_interrupt: tx=0x%x\n", musb->int_tx);
musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
}

if (musb->int_rx)
{
printk("mb86hxx_musb_interrupt: rx=0x%x\n", musb->int_rx);
musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
}

#if 0
if (musb->int_usb || musb->int_tx || musb->int_rx)
retval = musb_interrupt(musb);
#endif

spin_unlock_irqrestore(&musb->lock, flags);

#if 0
if (retval == IRQ_HANDLED)
return IRQ_HANDLED;

return IRQ_NONE;
#else
return IRQ_HANDLED;
#endif
}

static int mb86hxx_musb_init(struct musb *musb)
Expand All @@ -152,15 +163,18 @@ static int mb86hxx_musb_init(struct musb *musb)
struct platform_device *parent = to_platform_device(dev->parent);
struct resource *r;

printk("mb86hxx_musb_init\n");
printk("mb86hxx_musb_init: musb->mregs=0x%x\n", musb->mregs);

#if 0
r = platform_get_resource_byname(parent, IORESOURCE_MEM, "dma");
dma_base = devm_ioremap_resource(dev, r);
if (IS_ERR(dma_base))
{
printk("mb86hxx_musb_init: dma_base=0x%x\n", dma_base);
return PTR_ERR(dma_base);
}
musb->ctrl_base = dma_base;
#endif

printk("mb86hxx_musb_init: musb->ctrl_base=0x%x\n", musb->ctrl_base);

#if 0

Expand All @@ -186,6 +200,18 @@ static int mb86hxx_musb_exit(struct musb *musb)
return 0;
}

static void mb86hxx_musb_enable(struct musb *musb)
{
printk("mb86hxx_musb_enable\n");

}

static void mb86hxx_musb_disable(struct musb *musb)
{
printk("mb86hxx_musb_disable\n");

}

static const struct musb_hdrc_config mb86hxx_musb_config = {
#if 0
.fifo_cfg = mtk_musb_mode_cfg,
Expand All @@ -205,6 +231,9 @@ static const struct musb_platform_ops mb86hxx_musb_ops = {
.init = mb86hxx_musb_init,
.exit = mb86hxx_musb_exit,

.enable = mb86hxx_musb_enable,
.disable = mb86hxx_musb_disable,

.readb = mb86hxx_musb_readb,
.writeb = mb86hxx_musb_writeb,
.readw = mb86hxx_musb_readw,
Expand Down
13 changes: 3 additions & 10 deletions drivers/usb/musb/musb_core.c
Original file line number Diff line number Diff line change
Expand Up @@ -1202,8 +1202,11 @@ void musb_start(struct musb *musb)
u8 power;

musb_dbg(musb, "<== devctl %02x", devctl);
printk("musb_start: devctl =%02x\n", devctl);

#if 1
musb_enable_interrupts(musb);
#endif
musb_writeb(regs, MUSB_TESTMODE, 0);

power = MUSB_POWER_ISOUPDATE;
Expand Down Expand Up @@ -1772,10 +1775,6 @@ irqreturn_t musb_interrupt(struct musb *musb)
if (musb->int_usb)
retval |= musb_stage0_irq(musb, musb->int_usb, devctl);

#if 1
musb_disable_interrupts(musb);
#endif

if (musb->int_tx & 1) {
if (is_host_active(musb))
retval |= musb_h_ep0_irq(musb);
Expand Down Expand Up @@ -2534,14 +2533,12 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
/* be sure interrupts are disabled before connecting ISR */
musb_platform_disable(musb);
printk("musb_init_controller(12)\n");
#if 0
musb_disable_interrupts(musb);
printk("musb_init_controller(13)\n");
musb_writeb(musb->mregs, MUSB_DEVCTL, 0);

/* MUSB_POWER_SOFTCONN might be already set, JZ4740 does this. */
musb_writeb(musb->mregs, MUSB_POWER, 0);
#endif

printk("musb_init_controller(14)\n");

Expand All @@ -2552,29 +2549,25 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)

printk("musb_init_controller(15)\n");

#if 0
/* setup musb parts of the core (especially endpoints) */
status = musb_core_init(plat->config->multipoint
? MUSB_CONTROLLER_MHDRC
: MUSB_CONTROLLER_HDRC, musb);
if (status < 0)
goto fail3;
#endif

printk("musb_init_controller(16)\n");

timer_setup(&musb->otg_timer, musb_otg_timer_func, 0);

printk("musb_init_controller(17)\n");

#if 1
/* attach to the IRQ */
if (request_irq(nIrq, musb->isr, IRQF_SHARED/*|IRQF_IRQPOLL*/, dev_name(dev), musb)) {
dev_err(dev, "request_irq %d failed!\n", nIrq);
status = -ENODEV;
goto fail3;
}
#endif
printk("musb_init_controller(18)\n");
musb->nIrq = nIrq;
#if 0
Expand Down

1 comment on commit abf14c9

@Spitzbube
Copy link
Owner Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Booting Linux on physical CPU 0x0
Linux version 5.15.0-292613-g0c3fc4703b68-dirty (arm-linux-gnueabihf-gcc (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0, GNU ld (GNU Binutils for Ubuntu) 2.34) torvalds#113 Mon Oct 30 09:46:13 CET 2023
CPU: ARMv6-compatible processor [410fb767] revision 7 (ARMv7), cr=00c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
OF: fdt: Machine model: Fujitsu MB86HXX board
earlycon: pl11 at MMIO 0xc2000000 (options '')
printk: bootconsole [pl11] enabled
Memory policy: Data cache writeback
mb86hxx_map_io
Zone ranges:
Normal [mem 0x0000000020000000-0x0000000023ffffff]
Movable zone start for each node
Early memory node ranges
node 0: [mem 0x0000000020000000-0x0000000023ffffff]
Initmem setup node 0 [mem 0x0000000020000000-0x0000000023ffffff]
CPU: All CPU(s) started in SVC mode.
mb86hxx_init_early
start_kernel(1)
start_kernel(2)
start_kernel(3)
start_kernel(4)
pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
pcpu-alloc: [0] 0
start_kernel(5)
start_kernel(6)
start_kernel(7)
Built 1 zonelists, mobility grouping on. Total pages: 16256
start_kernel(8)
start_kernel(9)
Kernel command line: debug earlycon=pl011,0xc2000000 console=ttyAMA0,115200n8
start_kernel(10)
start_kernel(11)
start_kernel(12)
start_kernel(13)
start_kernel(14)
start_kernel(15)
Dentry cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
Inode-cache hash table entries: 4096 (order: 2, 16384 bytes, linear)
start_kernel(16)
start_kernel(17)
start_kernel(18)
mem auto-init: stack:off, heap alloc:off, heap free:off
Memory: 55000K/65536K available (3072K kernel code, 481K rwdata, 436K rodata, 5120K init, 184K bss, 10536K reserved, 0K cma-reserved)
SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
start_kernel(19)
start_kernel(20)
start_kernel(21)
start_kernel(22)
start_kernel(23)
start_kernel(24)
start_kernel(25)
start_kernel(26)
start_kernel(27)
start_kernel(28)
start_kernel(29)
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
start_kernel(30)
mb86hxx_init_irq
VIC @(ptrval): id 0x00041192, vendor 0x41
start_kernel(31)
start_kernel(32)
start_kernel(33)
start_kernel(34)
start_kernel(35)
start_kernel(36)
start_kernel(37)
start_kernel(38)
start_kernel(39)
start_kernel(39a)
start_kernel(40)
start_kernel(41)
random: get_random_bytes called from start_kernel+0x54c/0x8f4 with crng_init=0
start_kernel(42)
mb86hxx_clk_init
mb86hxx_clk_init: base=0xc4802000
mb86hxx_clk_init: data=0xfffff3
mb86hxx_register_apb_clock: ret=0
mb86hxx_recalc_rate: parent_rate=0
mb86hxx_register_uart_clock: ret=0
mb86hxx_clk_init: ret=0
mb86hxx_timer_init
mb86h60_timer_init: clock-frequency=81000000
clocksource: timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 23595807978 ns
mb86hxx_timer_shutdown
mb86hxx_timer_shutdown
start_kernel(42a)
start_kernel(43)
start_kernel(44)
start_kernel(45)
start_kernel(46)
start_kernel(47)
Console: colour dummy device 80x30
start_kernel(48)
start_kernel(49)
start_kernel(50)
start_kernel(51)
start_kernel(52)
start_kernel(53)
start_kernel(54)
start_kernel(55)
sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 21474836475000000ns
start_kernel(56)
Calibrating delay loop... 321.94 BogoMIPS (lpj=1609728)
start_kernel(57)
pid_max: default: 32768 minimum: 301
start_kernel(58)
Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
CPU: Testing write buffer coherency: ok
Setting up static identity map for 0x20100000 - 0x20100078
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
futex hash table entries: 256 (order: -1, 3072 bytes, linear)
DMA: preallocated 256 KiB pool for atomic coherent allocations
mb86hxx_init_machine
Serial: AMBA PL011 UART driver
amba_device_add
amba_device_try_add(1)
amba_device_try_add(2)
amba_device_try_add(3)
amba_device_try_add(4)
amba_device_try_add(5)
amba_get_enable_pclk(1)
amba_get_enable_pclk(2)
mb86hxx_clock_prepare
mb86hxx_clock_enable
amba_get_enable_pclk(3)
amba_get_enable_pclk: ret=0
amba_device_try_add(6)
amba_device_try_add(7)
amba_device_try_add(8)
amba_device_try_add(9)
amba_device_try_add(10)
amba_device_try_add(11)
amba_device_try_add(12)
amba_get_enable_pclk(1)
amba_get_enable_pclk(2)
mb86hxx_clock_prepare
mb86hxx_clock_enable
amba_get_enable_pclk(3)
pl011_probe(1)
pl011_probe(2)
pl011_probe(3)
pl011_probe(4)
pl011_probe(5)
pl011_probe(6)
pl011_register_port(1)
pl011_register_port(2)
pl011_register_port(4)
c2000000.serial: ttyAMA0 at MMIO 0xc2000000 (irq = 24, base_baud = 0) is a PL011 rev2
pl011_console_setup
pl011_console_setup: clk_prepare ret=0
pl011_console_setup: clk_prepare uap->port.uartclk=0
pl011_set_termios: port->uartclk=81000000, clkdiv=16, baud=115200
printk: console [ttyAMA0] enabled
printk: console [ttyAMA0] enabled
printk: bootconsole [pl11] disabled
printk: bootconsole [pl11] disabled
amba_device_try_add(13)
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
clocksource: Switched to clocksource timer
workingset: timestamp_bits=30 max_order=14 bucket_order=0
io scheduler mq-deadline registered
io scheduler kyber registered
mb86hxx_musb_probe
mb86hxx_create_musb_pdev
musb_probe: irq=37
musb_init_controller(1)
allocate_instance(1)
allocate_instance: success
musb_init_controller(3)
mb86hxx_musb_init: musb->mregs=0xc4850800
mb86hxx_musb_init: musb->ctrl_base=0xc4853000
musb_init_controller(5)
musb_init_controller(7)
musb_init_controller(8): setting read/write ops
musb_init_controller(9)
musb_init_controller(9a)
musb_init_controller(10)
musb_init_controller(11)
mb86hxx_musb_disable
musb_init_controller(12)
mb86hxx_musb_writeb: addr=0xc4850800, offset=0x0b, data=0x00
mb86hxx_musb_writew: addr=0xc4850800, offset=0x06, data=0x0000
mb86hxx_musb_writew: addr=0xc4850800, offset=0x08, data=0x0000
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x40
mb86hxx_musb_clearb: offset=0x0a, data=0x40
mb86hxx_musb_writeb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_clearw: offset=0x02, data=0x0000
mb86hxx_musb_writew: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_clearw: offset=0x04, data=0x0000
mb86hxx_musb_writew: addr=0xc4850800, offset=0x04, data=0x0000
musb_init_controller(13)
mb86hxx_musb_writeb: addr=0xc4850800, offset=0x60, data=0x00
mb86hxx_musb_writeb: addr=0xc4850800, offset=0x01, data=0x00
musb_init_controller(14)
musb_init_controller(15)
musb_core_init
musb_read_configdata
mb86hxx_musb_writeb: addr=0xc4850800, offset=0x0e, data=0x00
mb86hxx_musb_readb: addr=0xc4850800, offset=0x1f, data=0x02
musb-hdrc: ConfigData=0x02 (UTMI-8, SoftConn)
mb86hxx_musb_readw: addr=0xc4850800, offset=0x6c, data=0x0658
musb-hdrc: MHDRC RTL version 1.600
mb86hxx_musb_readb: addr=0xc4850800, offset=0x11f, data=0x99
mb86hxx_musb_readb: addr=0xc4850800, offset=0x12f, data=0x99
mb86hxx_musb_readb: addr=0xc4850800, offset=0x13f, data=0xaa
mb86hxx_musb_readb: addr=0xc4850800, offset=0x14f, data=0x60
musb_init_controller(16)
musb_init_controller(17)
musb_init_controller(18)
musb_init_controller(19)
musb_init_controller(20)
musb-hdrc musb-hdrc.0.auto: MUSB HDRC host driver
musb-hdrc musb-hdrc.0.auto: new USB bus registered, assigned bus number 1
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
mb86hxx_musb_readb: addr=0xc4850800, offset=0x60, data=0x98
musb_start: devctl =98
mb86hxx_musb_writew: addr=0xc4850800, offset=0x06, data=0x001f
mb86hxx_musb_writew: addr=0xc4850800, offset=0x08, data=0x001e
mb86hxx_musb_writeb: addr=0xc4850800, offset=0x0b, data=0xf7
mb86hxx_musb_writeb: addr=0xc4850800, offset=0x0f, data=0x00
mb86hxx_musb_writeb: addr=0xc4850800, offset=0x01, data=0xa0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x60, data=0x98
mb86hxx_musb_enable
mb86hxx_musb_writeb: addr=0xc4850800, offset=0x60, data=0x99
musb_init_controller(21): status=0
musb_init_controller(22): success
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
mb86hxx_init_late
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x10
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x10, tx=0x0, rx=0x0
mb86hxx_musb_writeb: addr=0xc4850800, offset=0x0a, data=0x10
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000
mb86hxx_musb_interrupt: usb=0x0, tx=0x0, rx=0x0
mb86hxx_musb_readb: addr=0xc4850800, offset=0x0a, data=0x00
mb86hxx_musb_readw: addr=0xc4850800, offset=0x02, data=0x0000
mb86hxx_musb_readw: addr=0xc4850800, offset=0x04, data=0x0000

Please sign in to comment.