- 👋 Hi, I’m @SudeepJoshi22
- 👀 I’m interested in ... Computer Architecture, VLSI, and Analog Electronics
- 🌱 I’m currently learning ... RISC-V ISA and Microarchitecures
- 💞️ I’m looking to collaborate on ... RISC-V projects
- 📫 How to reach me ... follow me on Linkedin: https://www.linkedin.com/in/sudeep-joshi-569951207/
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Minor-Project-2023-RISC-V-processor
Minor-Project-2023-RISC-V-processor PublicVerilog HDL code and documentation for pipelined RISC-V processors designed as a minor project by a team of 4. Includes testbench files, documentation, and sample programs. Completed as part of our…
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Qm.n-and-Integer-Interconversions
Qm.n-and-Integer-Interconversions PublicSigned Integer to Qm.n binary conversion and vice versa written in Python.
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