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Fix memory alignment for SIMD #1937

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falkTX
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@falkTX falkTX commented Mar 29, 2022

Similar to #1936 this fixes issues regarding memory alignment.
Here these issues can happen on any OS, I had the case where changing Port struct would lead to crashes due to how these were packed in a std::vector.
SSE (and NEON) requires the data it accesses to be aligned, otherwise results in a crash (SIGBUS on ARM).
I guess Rack was lucky that Port contents are able to be packed together in a way that keeps SSE working.

Same with #1936 please take these changes and do with them as you please.
I am here in written text giving you full rights to this patch / code changes.

Signed-off-by: falkTX <falktx@falktx.com>
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falkTX commented Mar 29, 2022

To add a few notes: while we do not see the issues on current Rack as-is, it is possible to trigger it by changing the Port struct (at least on my side..)
The issue is more prevalent on 32bit systems, like windows 32bit, which some people still like to use in order to keep slightly older but fully functioning hardware alive.
There is a whole conversation about it at DISTRHO/Cardinal#80 where we investigate the issue until finding a solution which this PR is the fix for. A couple plugins need similar changes, I will try to fix them and send PRs their way as well.

PS: Sorry commented this on the wrong ticket.. meant for this specific info to be here and not on #1936

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We are unfortunately unable to review or accept pull requests to VCV Rack due to copyright reasons regarding unlicensed third-party code in VCV Rack Pro. For more information see https://github.com/VCVRack/Rack/blob/v2/.github/CONTRIBUTING.md. We encourage you to instead contact VCV Support for feature requests and bug fixes.

@AndrewBelt AndrewBelt closed this Apr 25, 2022
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dromer commented Apr 25, 2022

@AndrewBelt There are no "copyright reasons" as @falkTX explicitly gave you full rights to use the diff as you please.

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