zig update: Remove Cpu.Arch.dxil and ObjectFormat.dxcontainer.

ziglang/zig#21467

src/aro/target.zig

@@ -483,7 +483,6 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target {
         .spirv,
         .spirv32,
         .loongarch32,
-        .dxil,
         .xtensa,
         => {}, // Already 32 bit
 
@@ -510,7 +509,6 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target {
         .arc,
         .avr,
         .csky,
-        .dxil,
         .hexagon,
         .kalimba,
         .lanai,
@@ -579,7 +577,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
         .bpfel => "bpfel",
         .bpfeb => "bpfeb",
         .csky => "csky",
-        .dxil => "dxil",
         .hexagon => "hexagon",
         .loongarch32 => "loongarch32",
         .loongarch64 => "loongarch64",
@@ -703,21 +700,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 {
         .cygnus => "cygnus",
         .simulator => "simulator",
         .macabi => "macabi",
-        .pixel => "pixel",
-        .vertex => "vertex",
-        .geometry => "geometry",
-        .hull => "hull",
-        .domain => "domain",
-        .compute => "compute",
-        .library => "library",
-        .raygeneration => "raygeneration",
-        .intersection => "intersection",
-        .anyhit => "anyhit",
-        .closesthit => "closesthit",
-        .miss => "miss",
-        .callable => "callable",
-        .mesh => "mesh",
-        .amplification => "amplification",
         .ohos => "openhos",
     };
     writer.writeAll(llvm_abi) catch unreachable;