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sbc100 committed May 29, 2024
1 parent 44c0a15 commit e5fa979
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2 changes: 1 addition & 1 deletion document/core/binary/instructions.rst
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Expand Up @@ -196,7 +196,7 @@ Each variant of :ref:`memory instruction <syntax-instr-memory>` is encoded with
.. math::
\begin{array}{llclll}
\production{memory argument} & \Bmemarg &::=&
a{:}\Bu32~~o{:}\Bu32 &\Rightarrow& \{ \ALIGN~a,~\OFFSET~o \} \\
a{:}\Bu32~~o{:}\Bu64 &\Rightarrow& \{ \ALIGN~a,~\OFFSET~o \} \\
\production{instruction} & \Binstr &::=& \dots \\ &&|&
\hex{28}~~m{:}\Bmemarg &\Rightarrow& \I32.\LOAD~m \\ &&|&
\hex{29}~~m{:}\Bmemarg &\Rightarrow& \I64.\LOAD~m \\ &&|&
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8 changes: 5 additions & 3 deletions document/core/binary/types.rst
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Expand Up @@ -130,7 +130,9 @@ Limits
\begin{array}{llclll}
\production{limits} & \Blimits &::=&
\hex{00}~~n{:}\Bu32 &\Rightarrow& \{ \LMIN~n, \LMAX~\epsilon \} \\ &&|&
\hex{01}~~n{:}\Bu32~~m{:}\Bu32 &\Rightarrow& \{ \LMIN~n, \LMAX~m \} \\
\hex{01}~~n{:}\Bu32~~m{:}\Bu32 &\Rightarrow& \{ \LMIN~n, \LMAX~m \} \\ &&|&
\hex{04}~~n{:}\Bu64 &\Rightarrow& \{ \LMIN~n, \LMAX~\epsilon \} \\ &&|&
\hex{05}~~n{:}\Bu64~~m{:}\Bu64 &\Rightarrow& \{ \LMIN~n, \LMAX~m \}
\end{array}
Expand All @@ -146,7 +148,7 @@ Memory Types
.. math::
\begin{array}{llclll@{\qquad\qquad}l}
\production{memory type} & \Bmemtype &::=&
\X{lim}{:}\Blimits &\Rightarrow& \X{lim} \\
(\X{it}, \X{lim}){:}\Blimits &\Rightarrow& \X{it}~~\X{lim} \\
\end{array}
Expand All @@ -162,7 +164,7 @@ Table Types
.. math::
\begin{array}{llclll}
\production{table type} & \Btabletype &::=&
\X{et}{:}\Breftype~~\X{lim}{:}\Blimits &\Rightarrow& \X{lim}~\X{et} \\
\X{et}{:}\Breftype~~(\X{it}, \X{lim}){:}\Blimits &\Rightarrow& \X{it}~~\X{lim}~\X{et} \\
\end{array}
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11 changes: 2 additions & 9 deletions document/core/syntax/instructions.rst
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Expand Up @@ -547,10 +547,8 @@ Instructions in this group are concerned with linear :ref:`memory <syntax-mem>`.

.. math::
\begin{array}{llcl}
\production{index type} & \X{it} &::=&
\idxtype \\
\production{memory immediate} & \memarg &::=&
\{ \OFFSET~\X{it}, \ALIGN~\u32 \} \\
\{ \OFFSET~\u64, \ALIGN~\u32 \} \\
\production{lane width} & \X{ww} &::=&
8 ~|~ 16 ~|~ 32 ~|~ 64 \\
\production{instruction} & \instr &::=&
Expand Down Expand Up @@ -585,18 +583,13 @@ Instructions in this group are concerned with linear :ref:`memory <syntax-mem>`.
Memory is accessed with |LOAD| and |STORE| instructions for the different :ref:`number types <syntax-numtype>`.
They all take a *memory immediate* |memarg| that contains an address *offset* and the expected *alignment* (expressed as the exponent of a power of 2).
The type of the *offset* corresponds to the *index type* of the memory which will
be either |U32| (for 32-bit memories) or |U64| (for 64-bit memories).
Integer loads and stores can optionally specify a *storage size* that is smaller than the :ref:`bit width <syntax-numtype>` of the respective value type.
In the case of loads, a sign extension mode |sx| is then required to select appropriate behavior.

Vector loads can specify a shape that is half the :ref:`bit width <syntax-valtype>` of |V128|. Each lane is half its usual size, and the sign extension mode |sx| then specifies how the smaller lane is extended to the larger lane.
Alternatively, vector loads can perform a *splat*, such that only a single lane of the specified storage size is loaded, and the result is duplicated to all lanes.

The static address offset is added to the dynamic address operand. The type of
the dynamic, like the static offset, corresponds to the *index type* of
memory. The result of this addition is a 33 bit or 65 bit *effective address*
that is the zero-based index at which the memory is accessed.
The static address offset is added to the dynamic address operand, yielding a 33 bit *effective address* that is the zero-based index at which the memory is accessed.
All values are read and written in |LittleEndian|_ byte order.
A :ref:`trap <trap>` results if any of the accessed memory bytes lies outside the address range implied by the memory's current size.

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39 changes: 32 additions & 7 deletions document/core/syntax/types.rst
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Expand Up @@ -156,12 +156,23 @@ They are also used to classify the inputs and outputs of :ref:`instructions <syn
\end{array}
.. _syntax-idxtype:

Index Type
~~~~~~~~~~

.. math::
\begin{array}{llll}
\production{index type} & \idxtype &::=&
\I32 ~|~ \I64 \\
\end{array}
.. index:: ! limits, memory type, table type
pair: abstract syntax; limits
single: memory; limits
single: table; limits
.. _syntax-limits:
.. _syntax-idxtype:

Limits
~~~~~~
Expand All @@ -170,10 +181,8 @@ Limits

.. math::
\begin{array}{llll}
\production{index type} & \idxtype &::=&
\u32 ~|~ \u64 \\
\production{limits} & \limits.\X{it} &::=&
\{ \LMIN~\X{it}, \LMAX~\X{it}^? \} \\
\production{limits} & \limits(iv) &::=&
\{ \LMIN~\X{iv}, \LMAX~\X{iv}^? \} \\
\end{array}
If no maximum is given, the respective storage can grow to any size.
Expand All @@ -193,7 +202,15 @@ Memory Types
.. math::
\begin{array}{llll}
\production{memory type} & \memtype &::=&
\idxtype~\limits.\X{it} \\
~\idxtype~\limits(type(\X{iv})) \\
\end{array}
where

.. math::
\begin{array}{lclllllcl}
type(\i32) &=& \I32 \\
type(\i64) &=& \I64
\end{array}
The limits constrain the minimum and optionally the maximum size of a memory.
Expand All @@ -214,7 +231,15 @@ Table Types
.. math::
\begin{array}{llll}
\production{table type} & \tabletype &::=&
\limits.\u32 ~\reftype \\
~\idxtype~\limits(type(\X{iv})) ~\reftype \\
\end{array}
where

.. math::
\begin{array}{lclllllcl}
type(\i32) &=& \I32 \\
type(\i64) &=& \I64
\end{array}
Like memories, tables are constrained by limits for their minimum and optionally maximum size.
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2 changes: 1 addition & 1 deletion document/core/text/modules.rst
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Expand Up @@ -361,7 +361,7 @@ A :ref:`data segment <text-data>` can be given inline with a memory definition,
.. math::
\begin{array}{llclll}
\production{module field} &
\text{(}~\text{memory}~~\Tid^?~~\text{(}~\text{data}~~b^n{:}\Tdatastring~\text{)}~~\text{)} \quad\equiv \\ & \qquad
\text{(}~\text{memory}~~\Tid^?~~\Tidxtype^?~~\text{(}~\text{data}~~b^n{:}\Tdatastring~\text{)}~~\text{)} \quad\equiv \\ & \qquad
\text{(}~\text{memory}~~\Tid'~~m~~m~\text{)} \\ & \qquad
\text{(}~\text{data}~~\text{(}~\text{memory}~~\Tid'~\text{)}~~\text{(}~\text{i32.const}~~\text{0}~\text{)}~~\Tdatastring~\text{)}
\\ & \qquad\qquad
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19 changes: 17 additions & 2 deletions document/core/text/types.rst
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Expand Up @@ -113,6 +113,19 @@ Multiple anonymous parameters or results may be combined into a single declarati
(\text{(}~~\text{result}~~\Tvaltype~~\text{)})^\ast \\
\end{array}
.. index:: index type
pair: text format; index type
.. _text-idxtype:

Index Type
~~~~~~~~~~

.. math::
\begin{array}{llclll}
\production{index type} & \Tidxtype &::=&
\text{i32} &\Rightarrow& \I32 \\ &&|&
\text{i64} &\Rightarrow& \I64 \\
\end{array}
.. index:: limits
pair: text format; limits
Expand All @@ -139,7 +152,8 @@ Memory Types
.. math::
\begin{array}{llclll@{\qquad\qquad}l}
\production{memory type} & \Tmemtype &::=&
\X{lim}{:}\Tlimits &\Rightarrow& \X{lim} \\
\X{lim}{:}\Tlimits &\Rightarrow& \I32~\X{lim} \\ &&|&
\X{it}{:}\Tidxtype~~\X{lim}{:}\Tlimits &\Rightarrow& \X{it}~\X{lim} \\
\end{array}
Expand All @@ -153,7 +167,8 @@ Table Types
.. math::
\begin{array}{llclll}
\production{table type} & \Ttabletype &::=&
\X{lim}{:}\Tlimits~~\X{et}{:}\Treftype &\Rightarrow& \X{lim}~\X{et} \\
\X{lim}{:}\Tlimits~~\X{et}{:}\Treftype &\Rightarrow& \I32~\X{lim}~\X{et} \\ &&|&
\X{it}{:}\Tidxtype~~\X{lim}{:}\Tlimits~~\X{et}{:}\Treftype &\Rightarrow& \X{it}~\X{lim}~\X{et}
\end{array}
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1 change: 1 addition & 0 deletions document/core/util/macros.def
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Expand Up @@ -775,6 +775,7 @@

.. |Tglobaltype| mathdef:: \xref{text/types}{text-globaltype}{\T{globaltype}}
.. |Ttabletype| mathdef:: \xref{text/types}{text-tabletype}{\T{tabletype}}
.. |Tidxtype| mathdef:: \xref{text/types}{text-idxtype}{\T{idxtype}}
.. |Tmemtype| mathdef:: \xref{text/types}{text-memtype}{\T{memtype}}
.. |Tlimits| mathdef:: \xref{text/types}{text-limits}{\T{limits}}

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