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Update 64x2 instructions #115

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Oct 1, 2019
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Update 64x2 instructions #115

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3 changes: 1 addition & 2 deletions proposals/simd/BinarySIMD.md
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Expand Up @@ -132,12 +132,11 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`.
| `i32x4.sub` | `0x7c`| - |
| `i32x4.mul` | `0x7f`| - |
| `i64x2.neg` | `0x84`| - |
| `i64x2.any_true` | `0x85`| - |
| `i64x2.all_true` | `0x86`| - |
| `i64x2.shl` | `0x87`| - |
| `i64x2.shr_s` | `0x88`| - |
| `i64x2.shr_u` | `0x89`| - |
| `i64x2.add` | `0x8a`| - |
| `i64x2.mul` | `0x8c`| - |
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I thought we were reserving 0x90 for i64x2.mul.
i8x16.mul(0x5d) = i8x16.neg(0x51) + 12
i16x8.mul(0x6e) = i16x8.neg(0x62) + 12
i32x4.mul(0x7f) = i32x4.neg(0x73) + 12
i64x2.mul(0x8c) = i64x2.neg(0x84) + 8?

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Good point, I don't think these are final yet, we will look at the actual opcodes again once we have a complete set. There will probably be reordering required.

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We were pretty intentional in laying out the opcode space about a year ago before we started adding new instructions, so I think we should respect those decisions where possible.

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@ngzhian ngzhian Oct 4, 2019 •
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I'm happy to change the opcode of i64x2.mul, but with new instructions like the load_splat and load_extend, the space of i8x16 and the space of i64x2 will not be the same size anymore, and this nice equation mapping *.neg to *.mul will conflict with the goal of keeping all the i8x16 instructions together (supposing there is such a goal).

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#116

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Right, I agree that for new instructions like load_splat, load_extend, narrowing, and widening just putting them at the end of the opcode space for now is the best move.

| `i64x2.sub` | `0x8d`| - |
| `f32x4.abs` | `0x95`| - |
| `f32x4.neg` | `0x96`| - |
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3 changes: 1 addition & 2 deletions proposals/simd/ImplementationStatus.md
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Expand Up @@ -110,13 +110,12 @@
| `i32x4.sub` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
| `i32x4.mul` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
| `i64x2.neg` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
| `i64x2.any_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
| `i64x2.all_true` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
| `i64x2.shl` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
| `i64x2.shr_s` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
| `i64x2.shr_u` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
| `i64x2.add` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
| `i64x2.sub` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
| `i64x2.mul` | | | | |
| `f32x4.abs` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
| `f32x4.neg` | `-msimd128` | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: |
| `f32x4.sqrt` | `-munimplemented-simd128` | | :heavy_check_mark: | :heavy_check_mark: |
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3 changes: 1 addition & 2 deletions proposals/simd/SIMD.md
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Expand Up @@ -369,6 +369,7 @@ def S.sub(a, b):
### Integer multiplication
* `i16x8.mul(a: v128, b: v128) -> v128`
* `i32x4.mul(a: v128, b: v128) -> v128`
* `i64x2.mul(a: v128, b: v128) -> v128`

Lane-wise wrapping integer multiplication:

Expand Down Expand Up @@ -548,7 +549,6 @@ These operations reduce all the lanes of an integer vector to a single scalar
* `i8x16.any_true(a: v128) -> i32`
* `i16x8.any_true(a: v128) -> i32`
* `i32x4.any_true(a: v128) -> i32`
* `i64x2.any_true(a: v128) -> i32`

These functions return 1 if any lane in `a` is non-zero, 0 otherwise.

Expand All @@ -564,7 +564,6 @@ def S.any_true(a):
* `i8x16.all_true(a: v128) -> i32`
* `i16x8.all_true(a: v128) -> i32`
* `i32x4.all_true(a: v128) -> i32`
* `i64x2.all_true(a: v128) -> i32`

These functions return 1 if all lanes in `a` are non-zero, 0 otherwise.

Expand Down