Allow building xilskey for devices without GPIO. #117
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This patch fixes below violation:
Implicit conversion: actual to formal param (MR).
MISRA-C:2012 R.10.3
Signed-off-by: Pamela Singh <pamela.singh-lloyd@xilinx.com>
Acked-for-series: VNSL Durga Challa <vnsl.durga.challa@xilinx.com>
This patch fixes below violation:
Attempt to change parameter passed by value.
MISRA-C:2012 R.17.8
Signed-off-by: Pamela Singh <pamela.singh-lloyd@xilinx.com>
Acked-for-series: VNSL Durga Challa <vnsl.durga.challa@xilinx.com>
This patch fixes below violation: Potentially infinite loop found. MISRA-C:2012 R.2.1 Signed-off-by: Pamela Singh <pamela.singh-lloyd@xilinx.com> Acked-for-series: VNSL Durga Challa <vnsl.durga.challa@xilinx.com>
In the function implementation for XPmDevice_IsClockActive, a function call is made to check if clock of gate is enabled. However if, for the clock topology, gate does not exist, failure is returned. Hence, handle the case where gate is not part of topology by adding error code and handle it in XPm_IsClockActive. For eg., WDT implements custom topology and does not have gate. When, linux is halted, there are checks to see if device's clocks are active. During this check whether WDT is active, it returns Error message during check for clock gating Signed-off-by: Amit Sunil Dhamne <amit.sunil.dhamne@xilinx.com> Acked-by: Jolly Shah <jolly.shah@xilinx.com> Acked-by: Jolly Shah <jolly.shah@xilinx.com>
… CDO Store base addresses belongs to different power domains passed from CDO, in respective power domain structure. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
…_GSW_ERR Instead of using hard coded address of PMC_GLOBAL_PMC_GSW_ERR use address passed from topology. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Instead of using hard coded address of PMC_GLOBAL_PL_STATUS, use address passed from topology. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
PMC_ANALOG related macros are not used in xillibpm. Removed unused macro related to PMC_ANALOG. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Instead of using hard coded register CPM_SLCR_SECURE, use address of CPM_SLCR_SECURE passed from topology. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Use base address of FPD_SLCR passed from topology instead of hard coded macro. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Use base address of LPD_SLCR_SECURE passed from topology instead of hard coded macro. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Use base address of CPM_SLCR passed from topology instead of hard coded macro. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Use base address of CFU_APB passed from topology cdo instead of hard coded macro whereever possible. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Instead of using hard coded macro of CFRAME0 base address, use register address passed by topology. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Use base address of CPM_PCSR passed from topology instead of using hard coded macro. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Instead of using hard coded macro of LPD_SLCR base address, use register address passed by topology. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Instead of using hard coded macro of EFUSE_CACHE base address, use register address passed by topology. Also, corrects node indexes of AMS ROOT and EFUSE. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Use base address of AMS_ROOT passed from topology instead of using hard coded macro. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Use base address of PSM_GLOBAL passed from topology instead of using hard coded macro. Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Organize register macros module wise in xpm_regs.h Signed-off-by: Tejas Patel <tejas.patel@xilinx.com> Acked-for-series: Rajan Vaja <rajan.vaja@xilinx.com>
Updated examples for versal platform. Added interrupt example support. Updated gpio pin numbers for versal. Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com> Acked-for-series: Srinivas Goud <srinivas.goud@xilinx.com>
This patch fixes below violation:
Procedure contains UR data flow anomalies.
MISRA-C:2012 R.9.1
Signed-off-by: Pamela Singh <pamela.singh-lloyd@xilinx.com>
Updated error codes and clearing secure buffers upon authentication/decryption failure Signed-off-by: VNSL Durga Challa <vnsl.durga.challa@xilinx.com> Acked-for-series: Kalyani Akula <kalyani.akula@xilinx.com>
This patch adds different key sources support Signed-off-by: VNSL Durga Challa <vnsl.durga.challa@xilinx.com> Acked-for-series: Kalyani Akula <kalyani.akula@xilinx.com>
Added support for reading headers from buffer based on the flag. Signed-off-by: VNSL Durga Challa <vnsl.durga.challa@xilinx.com> Acked-for-series: Kalyani Akula <kalyani.akula@xilinx.com>
If headers are in encrypted format xilloader decrypts the headers and copies to structures. Signed-off-by: VNSL Durga Challa <vnsl.durga.challa@xilinx.com> Acked-for-series: Kalyani Akula <kalyani.akula@xilinx.com>
This patch sets SHA engine into reset upon failure. Removed reset hardcoded values to functions for ECDSA. Modified prints as they are generic functions even header authentication uses the same API for authentication. Signed-off-by: VNSL Durga Challa <vnsl.durga.challa@xilinx.com> Acked-for-series: Kalyani Akula <kalyani.akula@xilinx.com>
Use below directory structure of xilpm to add support for versal and move existing xilpm zynqmp code to client_zynqmp directory. - data - src |- client_zynqmp | |- common | |- apu | |- rpu | |- client_versal |- server_versal Update xilpm.tcl and copy_bsp.sh accordingly to copy platform and processor specific code. Signed-off-by: Ravi Patel <ravi.patel@xilinx.com> Acked-for-series: Jolly Shah <jolly.shah@xilinx.com>
Move xillibpm client specific code to client_versal directory of xilpm library. Also update Makefile of xilpm versal_client to generate xilpm library instead of xillibpm. Signed-off-by: Ravi Patel <ravi.patel@xilinx.com> Acked-for-series: Jolly Shah <jolly.shah@xilinx.com>
This reverts commit 1db0146. Because of this commit MMC error observed during Linux boot. Need to debug this issue. So revert this commit for temporary solution. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Acked-by: Tejas Patel <tejas.patel@xilinx.com> Acked-by: Tejas Patel <tejas.patel@xilinx.com>
Resolved Greenish Hue seen in HDMI Signed-off-by: Niharika S <niharika.s@xilinx.com> Acked by : Pankaj Kumbhare <pankajk@xilinx.com>
…oaded from SMAP This is accomplished by reading SBI_CTRL register in the interrupt handler for SBI_DATA_RDY interrupt. The register value is used to ascertain if the pdi was sent through SMAP or SBI jtag mode. Signed-off-by: Vikram Sreenivasa Batchali <b.vikram@xilinx.com> Acked-by: Rajababu Mailapalli<rajababu.mailaplli@xilinx.com> Acked-by: Rajababu Mailapalli<rajababu.mailaplli@xilinx.com>
Updated the application to rectify data misalignment for 12G-SDI Signed-off-by: S Shreesh <sshreesh@xilinx.com> Acked by : Shruti Gupta <shrutigu@xilinx.com>
The commit enables assertion logic for linux and simulation platforms. This enables the driver to assert when the input arguments are invalid. Signed-off-by: Tejus Siddagangaiah <tejus.siddagangaiah@xilinx.com> Acked-for-series: Hyun Kwon <hyun.kwon@xilinx.com>
The commit removes unwanted assertion in the api. Without this change, call to the api will always assert. Signed-off-by: Tejus Siddagangaiah <tejus.siddagangaiah@xilinx.com> Acked-for-series: Hyun Kwon <hyun.kwon@xilinx.com>
This reverts commit d3ce626. In MST mode, application getting crashed because of this fix. Revert needed to retain the MST mode working. Signed-off-by: Jagadeesh Banisetti <jagadeesh.banisetti@xilinx.com> Acked-for-series: Sandip Kothari <Sandip.kothari@xilinx.com>
This reverts commit 0717fc0. For MST mode, generation of xdptxss_g.c file is not correct, and causing no display for streams 2, 3 and 4. Signed-off-by: Jagadeesh Banisetti <jagadeesh.banisetti@xilinx.com> Acked-for-series: Sandip Kothari <Sandip.kothari@xilinx.com>
This patch will add support for version less ZynqMP Fsbl builds for 2019.2 Changes: Removed xipipsu_g.c file from misc folder. Added separate xipipsu_g.c files in a53 and r5 folders. Based on 2019.2 daily latest ZynqMP Fsbl, changed pm_cfg_obj.c file Changed copy_bsp.h to read xipipsu_g.c file from misc/zcu102/a53 or r5. Signed-off-by: Sivaji Boddupilli <sivajib@xilinx.com> Acked-by: Vikram Sreenivasa Batchali <b.vikram@xilinx.com> Acked-by: Vikram Sreenivasa Batchali <b.vikram@xilinx.com>
Signed-off-by: Siva Addepalli <saddepal@xilinx.com>
This patch adds support for versionless build for PLM for 2019.2 release. Signed-off-by: Mounika Akula <mounika.akula@xilinx.com> Acked-by: Sarat Chand Savitala <sarat.chand.savitala@xilinx.com>
This patch does the following updates to the PLM versionless build: 1. It removes the unwanted changes in Makefile and copy_bsp.sh file 2. It changes the executable.elf to plm.elf 3. It adds Readme.txt for versionless build Signed-off-by: Mounika Akula <mounika.akula@xilinx.com> Acked-by: Vikram Sreenivasa Batchali <b.vikram@xilinx.com> Acked-by: Vikram Sreenivasa Batchali <b.vikram@xilinx.com>
This patch adds support for versionless build support for PSMFW for 2019.2 release. Signed-off-by: Mounika Akula <mounika.akula@xilinx.com> Acked-by: Sarat Chand Savitala <sarat.chand.savitala@xilinx.com> Acked-by: Sarat Chand Savitala <sarat.chand.savitala@xilinx.com>
This patch updates the PMU versionless build for 2019.2 release. Signed-off-by: Mounika Akula <mounika.akula@xilinx.com> Acked-by: Sarat Chand Savitala <sarat.chand.savitala@xilinx.com> Acked-by: Sarat Chand Savitala <sarat.chand.savitala@xilinx.com>
This patch fixed the XilPuf examples compilation on R5. Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com> Acked-by: VNSL Durga Challa <vnsl.durga.challa@xilinx.com>
…ense file Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
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(cherry picked from commit 604e2e2) Signed-off-by: Steffen Jaeckel <jaeckel@eyet-services.de>
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The xilskey library has a hard dependency on having a GPIO peripheral available for the JTAG, but that's only required for parts of the library.
e.g. programming the PS EFUSE bits doesn't require JTAG.
This PR adds a configuration switch to remove all parts of the library in case there's no GPIO/JTAG available.
[Edit] patch has been sent to git@xilinx.com