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examples: cleanup Zynq MP SoC AMP examples
Clean up the following Zynq MP SoC AMP examples: * shared memory demo * atomic operation over shared memory demo * shared memory with IPI demo * IPI latency measurement demo * shared memory with IPI latency measurement demo * shared memory with IPI throughput measurement demo Signed-off-by: Wendy Liang <jliang@xilinx.com>
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examples/system/generic/zynqmp_r5/zynqmp_amp_demo/common.h
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/* | ||
* Copyright (c) 2017, Xilinx Inc. and Contributors. All rights reserved. | ||
* | ||
* Redistribution and use in source and binary forms, with or without | ||
* modification, are permitted provided that the following conditions are met: | ||
* | ||
* 1. Redistributions of source code must retain the above copyright notice, | ||
* this list of conditions and the following disclaimer. | ||
* | ||
* 2. Redistributions in binary form must reproduce the above copyright notice, | ||
* this list of conditions and the following disclaimer in the documentation | ||
* and/or other materials provided with the distribution. | ||
* | ||
* 3. Neither the name of Xilinx nor the names of its contributors may be used | ||
* to endorse or promote products derived from this software without | ||
* specific prior written permission. | ||
* | ||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | ||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | ||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE | ||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | ||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | ||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | ||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | ||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ||
* POSSIBILITY OF SUCH DAMAGE. | ||
*/ | ||
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#ifndef __COMMON_H__ | ||
#define __COMMON_H__ | ||
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#include <unistd.h> | ||
#include <stdio.h> | ||
#include <string.h> | ||
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#include <metal/atomic.h> | ||
#include <metal/alloc.h> | ||
#include <metal/irq.h> | ||
#include <errno.h> | ||
#include <metal/sys.h> | ||
#include <metal/cpu.h> | ||
#include <metal/io.h> | ||
#include <metal/device.h> | ||
#include <sys/types.h> | ||
#include "sys_init.h" | ||
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/* Devices names */ | ||
#define BUS_NAME "generic" | ||
#define IPI_DEV_NAME "ff310000.ipi" | ||
#define SHM_DEV_NAME "3ed80000.shm" | ||
#define TTC_DEV_NAME "ff110000.ttc" | ||
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/* IPI registers offset */ | ||
#define IPI_TRIG_OFFSET 0x0 /* IPI trigger reg offset */ | ||
#define IPI_OBS_OFFSET 0x4 /* IPI observation reg offset */ | ||
#define IPI_ISR_OFFSET 0x10 /* IPI interrupt status reg offset */ | ||
#define IPI_IMR_OFFSET 0x14 /* IPI interrupt mask reg offset */ | ||
#define IPI_IER_OFFSET 0x18 /* IPI interrupt enable reg offset */ | ||
#define IPI_IDR_OFFSET 0x1C /* IPI interrup disable reg offset */ | ||
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#define IPI_MASK 0x1000000 /* IPI mask for kick from APU. | ||
We use PL0 IPI in this demo. */ | ||
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/* TTC counter offsets */ | ||
#define XTTCPS_CLK_CNTRL_OFFSET 0x0 /* TTC counter clock control reg offset */ | ||
#define XTTCPS_CNT_CNTRL_OFFSET 0xC /* TTC counter control reg offset */ | ||
#define XTTCPS_CNT_VAL_OFFSET 0x18 /* TTC counter val reg offset */ | ||
#define XTTCPS_CNT_OFFSET(ID) (2 << (ID - 1)) /* TTC counter offset | ||
ID is from 1 to 3 */ | ||
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/* TTC counter control masks */ | ||
#define XTTCPS_CNT_CNTRL_RST_MASK 0x10U /* TTC counter constrol reset mask */ | ||
#define XTTCPS_CNT_CNTRL_DIS_MASK 0x01U /* TTC counter control disable mask */ | ||
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#define LPRINTF(format, ...) \ | ||
xil_printf("\r\nSERVER> " format, ##__VA_ARGS__) | ||
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#define LPERROR(format, ...) LPRINTF("ERROR: " format, ##__VA_ARGS__) | ||
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extern struct metal_device *ipi_dev; /* IPI metal device */ | ||
extern struct metal_device *shm_dev; /* IPI metal device */ | ||
extern struct metal_device *ttc_dev; /* IPI metal device */ | ||
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/** | ||
* @brief atomic_shmem_demod() - Shared memory atomic operation demo | ||
* This task will: | ||
* * Wait for the remote to write to shared memory. | ||
* * Once it receives the notification via polling, start atomic add by | ||
* 1 for 1000 times to first 32 bits of memory in the | ||
* shared memory location at 3ed00000 which is pointed to by shm_io. | ||
* * Write to shared mem to notify the remote once it finishes | ||
* calculation. | ||
* | ||
* @return - If setup failed, return the corresponding error number. Otherwise | ||
* return 0 on success. | ||
*/ | ||
int atomic_shmem_demod(); | ||
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/** | ||
* @brief ipi_latency_demod() - Show performance of IPI with Libmetal. | ||
* Loop until APU tells RPU to stop via shared memory. | ||
* In loop, wait for interrupt (interrupt handler stops APU to | ||
* RPU timer). Then reset count on RPU to APU timer to 0, start | ||
* counting and send interrupt to notify APU. | ||
* | ||
* @return - 0 on success, error code if failure. | ||
*/ | ||
int ipi_latency_demod(); | ||
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/** | ||
* @brief ipi_shmem_demod() - shared memory IPI demo | ||
* This task will: | ||
* * Wait for IPI interrupt from the remote | ||
* * Once it received the interrupt, copy the content from | ||
* the ping buffer to the pong buffer. | ||
* * Update the shared memory descriptor for the new available | ||
* pong buffer. | ||
* * Trigger IPI to notifty the remote. | ||
* | ||
* @return - 0 on success, error code if failure. | ||
*/ | ||
int ipi_shmem_demod(); | ||
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/** | ||
* @brief shmem_demod() - Show use of shared memory with Libmetal. | ||
* Until KEEP_GOING signal is stopped, keep looping. | ||
* In the loop, read message from remote, add one to message and | ||
* then respond. After the loop, cleanup resources. | ||
* | ||
* @return - return 0 on success, otherwise return error number indicating | ||
* type of error | ||
*/ | ||
int shmem_demod(); | ||
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/** | ||
* @brief shmem_latency_demod() - Show performance of shared mem. | ||
* Loop until APU tells RPU to stop via shared memory. | ||
* In loop, wait for interrupt (interrupt handler stops APU to | ||
* RPU timer). Then reset count on RPU to APU timer to 0, start | ||
* counting and send interrupt to notify APU. | ||
* | ||
* @return - 0 on success, error code if failure. | ||
*/ | ||
int shmem_latency_demod(); | ||
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/** | ||
* @brief shmem_throughput_demod() - Show throughput of shared mem. | ||
* At signal of remote, record total time to do block read and write | ||
* operation Loop until APU tells RPU to stop via shared memory. | ||
* In loop, wait for interrupt (interrupt handler stops APU to | ||
* RPU timer). Then reset count on RPU to APU timer to 0, start | ||
* counting and send interrupt to notify APU. | ||
* | ||
* @return - 0 on success, error code if failure. | ||
*/ | ||
int shmem_throughput_demod(); | ||
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inline void wait_for_interrupt() | ||
{ | ||
asm volatile("wfi"); | ||
} | ||
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/** | ||
* @breif wait_for_notified() - Loop until notified bit | ||
* in channel is set. | ||
* | ||
* @param[in] notified - pointer to the notified variable | ||
*/ | ||
inline void wait_for_notified(atomic_int *notified) | ||
{ | ||
unsigned int flags; | ||
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do { | ||
flags = metal_irq_save_disable(); | ||
if (!atomic_flag_test_and_set(notified)) { | ||
metal_irq_restore_enable(flags); | ||
break; | ||
} | ||
wait_for_interrupt(); | ||
metal_irq_restore_enable(flags); | ||
} while(1); | ||
} | ||
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/** | ||
* @brief print_demo() - print demo string | ||
* | ||
* @param[in] name - demo name | ||
*/ | ||
inline void print_demo(char *name) | ||
{ | ||
LPRINTF("====== libmetal demo: %s ======\n", name); | ||
} | ||
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#endif /* __COMMON_H__ */ | ||
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