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[AIE2P][GlobalISel]Legalize G_UNMERGE_VALUES for scalar source operand #277
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79 changes: 79 additions & 0 deletions
79
llvm/test/CodeGen/AIE/aie2p/GlobalIsel/legalize-unmerge-values.mir
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py | ||
# | ||
# This file is licensed under the Apache License v2.0 with LLVM Exceptions. | ||
# See https://llvm.org/LICENSE.txt for license information. | ||
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
# | ||
# (c) Copyright 2025 Advanced Micro Devices, Inc. or its affiliates | ||
# RUN: llc -mtriple aie2p -run-pass=legalizer %s -verify-machineinstrs -o - | FileCheck %s | ||
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--- | ||
name: test_scalarSrc_128 | ||
body: | | ||
bb.0.entry: | ||
; CHECK-LABEL: name: test_scalarSrc_128 | ||
; CHECK: [[DEF:%[0-9]+]]:_(s128) = G_IMPLICIT_DEF | ||
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s64>) = G_BITCAST [[DEF]](s128) | ||
; CHECK-NEXT: [[AIE_PAD_VECTOR_UNDEF:%[0-9]+]]:_(<4 x s64>) = G_AIE_PAD_VECTOR_UNDEF [[BITCAST]](<2 x s64>) | ||
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 | ||
; CHECK-NEXT: [[AIE_SEXT_EXTRACT_VECTOR_ELT:%[0-9]+]]:_(s64) = G_AIE_SEXT_EXTRACT_VECTOR_ELT [[AIE_PAD_VECTOR_UNDEF]](<4 x s64>), [[C]](s32) | ||
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 | ||
; CHECK-NEXT: [[AIE_SEXT_EXTRACT_VECTOR_ELT1:%[0-9]+]]:_(s64) = G_AIE_SEXT_EXTRACT_VECTOR_ELT [[AIE_PAD_VECTOR_UNDEF]](<4 x s64>), [[C1]](s32) | ||
; CHECK-NEXT: PseudoRET implicit $lr, implicit [[AIE_SEXT_EXTRACT_VECTOR_ELT]](s64), implicit [[AIE_SEXT_EXTRACT_VECTOR_ELT1]](s64) | ||
%0:_(s128) = G_IMPLICIT_DEF | ||
%1:_(s64), %2:_(s64) = G_UNMERGE_VALUES %0:_(s128) | ||
PseudoRET implicit $lr, implicit %1, implicit %2 | ||
... | ||
--- | ||
name: test_scalarSrc_s256 | ||
body: | | ||
bb.0.entry: | ||
; CHECK-LABEL: name: test_scalarSrc_s256 | ||
; CHECK: [[DEF:%[0-9]+]]:_(s256) = G_IMPLICIT_DEF | ||
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<4 x s64>) = G_BITCAST [[DEF]](s256) | ||
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 | ||
; CHECK-NEXT: [[AIE_SEXT_EXTRACT_VECTOR_ELT:%[0-9]+]]:_(s64) = G_AIE_SEXT_EXTRACT_VECTOR_ELT [[BITCAST]](<4 x s64>), [[C]](s32) | ||
; CHECK-NEXT: PseudoRET implicit $lr, implicit [[AIE_SEXT_EXTRACT_VECTOR_ELT]](s64) | ||
%0:_(s256) = G_IMPLICIT_DEF | ||
%1:_(s64), %2:_(s64), %3:_(s64), %4:_(s64) = G_UNMERGE_VALUES %0:_(s256) | ||
PseudoRET implicit $lr, implicit %1 | ||
--- | ||
name: test_scalarSrc_s512 | ||
body: | | ||
bb.0.entry: | ||
%0:_(s512) = G_IMPLICIT_DEF | ||
%1:_(s64), %2:_(s64), %3:_(s64), %4:_(s64), %5:_(s64), %6:_(s64), %7:_(s64), %8:_(s64) = G_UNMERGE_VALUES %0:_(s512) | ||
PseudoRET implicit $lr, implicit %1 | ||
... | ||
--- | ||
name: test_scalarSrc_s1024 | ||
body: | | ||
bb.0.entry: | ||
; CHECK-LABEL: name: test_scalarSrc_s1024 | ||
; CHECK: [[DEF:%[0-9]+]]:_(s1024) = G_IMPLICIT_DEF | ||
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<16 x s64>) = G_BITCAST [[DEF]](s1024) | ||
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 | ||
; CHECK-NEXT: [[AIE_SEXT_EXTRACT_VECTOR_ELT:%[0-9]+]]:_(s64) = G_AIE_SEXT_EXTRACT_VECTOR_ELT [[BITCAST]](<16 x s64>), [[C]](s32) | ||
; CHECK-NEXT: PseudoRET implicit $lr, implicit [[AIE_SEXT_EXTRACT_VECTOR_ELT]](s64) | ||
%0:_(s1024) = G_IMPLICIT_DEF | ||
%1:_(s64), %2:_(s64), %3:_(s64), %4:_(s64), %5:_(s64), %6:_(s64), %7:_(s64), %8:_(s64), %9:_(s64), %10:_(s64), %11:_(s64), %12:_(s64), %13:_(s64), %14:_(s64), %15:_(s64), %16:_(s64) = G_UNMERGE_VALUES %0:_(s1024) | ||
PseudoRET implicit $lr, implicit %1 | ||
... | ||
--- | ||
name: test_scalarSrc_s2048 | ||
body: | | ||
bb.0.entry: | ||
liveins: $dm0 | ||
; CHECK-LABEL: name: test_scalarSrc_s2048 | ||
; CHECK: liveins: $dm0 | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s2048) = COPY $dm0 | ||
; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<32 x s64>) = G_BITCAST [[COPY]](s2048) | ||
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 | ||
; CHECK-NEXT: [[AIE_SEXT_EXTRACT_VECTOR_ELT:%[0-9]+]]:_(s64) = G_AIE_SEXT_EXTRACT_VECTOR_ELT [[BITCAST]](<32 x s64>), [[C]](s32) | ||
; CHECK-NEXT: PseudoRET implicit $lr, implicit [[AIE_SEXT_EXTRACT_VECTOR_ELT]](s64) | ||
%0:_(s2048) = COPY $dm0 | ||
%1:_(s64), %2:_(s64), %3:_(s64), %4:_(s64), %5:_(s64), %6:_(s64), %7:_(s64), %8:_(s64), %9:_(s64), %10:_(s64), %11:_(s64), %12:_(s64), %13:_(s64), %14:_(s64), %15:_(s64), %16:_(s64), %17:_(s64), %18:_(s64), %19:_(s64), %20:_(s64), %21:_(s64), %22:_(s64), %23:_(s64), %24:_(s64), %25:_(s64), %26:_(s64), %27:_(s64), %28:_(s64), %29:_(s64), %30:_(s64), %31:_(s64), %32:_(s64) = G_UNMERGE_VALUES %0:_(s2048) | ||
PseudoRET implicit $lr, implicit %1 | ||
... |
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Original file line number | Diff line number | Diff line change |
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@@ -3690,6 +3690,37 @@ TEST_F(AArch64GISelMITest, BitcastBitOps) { | |
EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF; | ||
} | ||
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TEST_F(AArch64GISelMITest, BitcastUnMerge) { | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Nice approach! |
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setUp(); | ||
if (!TM) | ||
GTEST_SKIP(); | ||
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LLT S32 = LLT::scalar(32); | ||
LLT S128 = LLT::scalar(128); | ||
LLT V4S32 = LLT::fixed_vector(4, 32); | ||
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auto Src = B.buildUndef(S128); | ||
auto Unmerge = B.buildUnmerge(S32, Src); | ||
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DefineLegalizerInfo(A, {}); | ||
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AInfo Info(MF->getSubtarget()); | ||
DummyGISelObserver Observer; | ||
LegalizerHelper Helper(*MF, Info, Observer, B); | ||
B.setInsertPt(*EntryMBB, Unmerge->getIterator()); | ||
EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized, | ||
Helper.bitcast(*Unmerge, 1, V4S32)); | ||
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auto CheckStr = R"( | ||
CHECK: [[UNDEF:%[0-9]+]]:_(s128) = G_IMPLICIT_DEF | ||
CHECK: [[BITCAST:%[0-9]+]]:_(<4 x s32>) = G_BITCAST [[UNDEF]] | ||
CHECK: [[E0:%[0-9]+]]:_(s32), [[E1:%[0-9]+]]:_(s32), [[E0:%[0-9]+]]:_(s32), [[E1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[BITCAST]] | ||
)"; | ||
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// Check | ||
EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF; | ||
} | ||
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TEST_F(AArch64GISelMITest, CreateLibcall) { | ||
setUp(); | ||
if (!TM) | ||
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nit:
return !SrcTy.isVector();