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Merge pull request #19 from accel-sim/dev
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Dev
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mkhairy authored Oct 23, 2020
2 parents 464e07a + c8a286c commit 4c2bf09
Showing 1 changed file with 6 additions and 7 deletions.
13 changes: 6 additions & 7 deletions release.notes.md
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Expand Up @@ -6,12 +6,11 @@ Oct 23, 2020.
Major changes since v1.0.0:

1. Advanced disk space format to reduce the traces size (up to 5-10X reduction).
1. Optimized runtime memory footprint (up to 5-10X reduction).
1. Support for Nvbit 1.5
1. Fixed the generic loads address mapping
1. Fixed Atomic instruction parsing bug
1. Fixed the max_insn_limit bug
1. code reformatting
1. Adding support to Turing instruction traces
2. Optimized runtime memory footprint (up to 5-10X reduction).
3. Support for Nvbit 1.5
4. Fixed the generic loads address mapping
5. Fixed atomic instruction parsing bug
6. Fixed the max_insn_limit bug
7. Adding support to Turing instruction traces

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