Merge pull request torvalds#36 from aejsmith/ci20-v3.18-serial

Switch to new UART driver from upstream

This switches to the new UART driver that is now heading upstream
(in Ralf's upstream-sfr tree).

The reason this is done is because there still remain a few things that output to
UART0 rather than UART4 (the dedicated UART header), like the early console. 

The current code has UART0 harcoded for this.

The upstream driver allows the early console UART to be configured by DT,
so take advantage of this by switching to that driver and setting stdout-path
to UART4 in DT.

All serial output from the kernel should now go to UART4 by default.

Documentation/devicetree/bindings/serial/ingenic,uart.txt

@@ -0,0 +1,22 @@
+* Ingenic SoC UART
+
+Required properties:
+- compatible : "ingenic,jz4740-uart" or "ingenic,jz4780-uart"
+- reg : offset and length of the register set for the device.
+- interrupts : should contain uart interrupt.
+- clocks : phandles to the module & baud clocks.
+- clock-names: tuple listing input clock names.
+	Required elements: "baud", "module"
+
+Example:
+
+uart0: serial@10030000 {
+	compatible = "ingenic,jz4740-uart";
+	reg = <0x10030000 0x100>;
+
+	interrupt-parent = <&intc>;
+	interrupts = <9>;
+
+	clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
+	clock-names = "baud", "module";
+};

arch/mips/Kconfig

@@ -261,7 +261,6 @@ config MACH_JZ4780
 	select GENERIC_CLOCKEVENTS_BROADCAST if SMP
 	select IRQ_CPU
 	select ARCH_REQUIRE_GPIOLIB
-	select SYS_HAS_EARLY_PRINTK
 	select COMMON_CLK
 	select PINCTRL
 	select PINCTRL_JZ4780

arch/mips/boot/dts/ci20.dts

@@ -5,6 +5,17 @@
 / {
 	compatible = "imgtec,ci20", "ingenic,jz4780";
 
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		serial3 = &uart3;
+		serial4 = &uart4;
+	};
+
+	chosen {
+		stdout-path = &uart4;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x0 0x10000000

arch/mips/boot/dts/jz4740.dtsi

@@ -42,4 +42,26 @@
 
 		#clock-cells = <1>;
 	};
+
+	uart0: serial@10030000 {
+		compatible = "ingenic,jz4740-uart";
+		reg = <0x10030000 0x100>;
+
+		interrupt-parent = <&intc>;
+		interrupts = <9>;
+
+		clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
+		clock-names = "baud", "module";
+	};
+
+	uart1: serial@10031000 {
+		compatible = "ingenic,jz4740-uart";
+		reg = <0x10031000 0x100>;
+
+		interrupt-parent = <&intc>;
+		interrupts = <8>;
+
+		clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
+		clock-names = "baud", "module";
+	};
 };

arch/mips/boot/dts/jz4780.dtsi

@@ -392,7 +392,8 @@
 			interrupt-parent = <&intc>;
 			interrupts = <51>;
 
-			clocks = <&cgu JZ4780_CLK_UART0>;
+			clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
+			clock-names = "baud", "module";
 		};
 
 		uart1: serial@10031000 {
@@ -403,7 +404,8 @@
 			interrupt-parent = <&intc>;
 			interrupts = <50>;
 
-			clocks = <&cgu JZ4780_CLK_UART1>;
+			clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
+			clock-names = "baud", "module";
 		};
 
 		uart2: serial@10032000 {
@@ -416,7 +418,8 @@
 
 			pinctrl-names = "default";
 			pinctrl-0 = <&pins_uart2_dataplusflow>;
-			clocks = <&cgu JZ4780_CLK_UART2>;
+			clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
+			clock-names = "baud", "module";
 		};
 
 		uart3: serial@10033000 {
@@ -427,7 +430,8 @@
 			interrupt-parent = <&intc>;
 			interrupts = <48>;
 
-			clocks = <&cgu JZ4780_CLK_UART3>;
+			clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
+			clock-names = "baud", "module";
 		};
 
 		uart4: serial@10034000 {
@@ -438,7 +442,8 @@
 			interrupt-parent = <&intc>;
 			interrupts = <34>;
 
-			clocks = <&cgu JZ4780_CLK_UART4>;
+			clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
+			clock-names = "baud", "module";
 		};
 
 		i2c0: i2c0@0x10050000 {

arch/mips/boot/dts/qi_lb60.dts

@@ -4,6 +4,10 @@
 
 / {
 	compatible = "qi,lb60", "ingenic,jz4740";
+
+	chosen {
+		stdout-path = &uart0;
+	};
 };
 
 &ext {

arch/mips/configs/ci20_defconfig

@@ -97,6 +97,7 @@ CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=5
 CONFIG_SERIAL_8250_RUNTIME_UARTS=5
+CONFIG_SERIAL_8250_INGENIC=y
 CONFIG_SERIAL_OF_PLATFORM=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C_JZ4780=y
@@ -202,7 +203,6 @@ CONFIG_PANIC_ON_OOPS=y
 # CONFIG_DEBUG_PREEMPT is not set
 CONFIG_STACKTRACE=y
 # CONFIG_FTRACE is not set
-# CONFIG_EARLY_PRINTK is not set
 CONFIG_CMDLINE_BOOL=y
 CONFIG_CMDLINE="console=ttyS4,115200 clk_ignore_unused"
 CONFIG_XZ_DEC=y

arch/mips/configs/qi_lb60_defconfig

@@ -66,6 +66,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
 # CONFIG_SERIAL_8250_DMA is not set
 CONFIG_SERIAL_8250_NR_UARTS=2
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_INGENIC=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_SPI=y
 CONFIG_SPI_GPIO=y

arch/mips/include/asm/mach-jz4740/platform.h

@@ -35,6 +35,4 @@ extern struct platform_device jz4740_wdt_device;
 extern struct platform_device jz4740_pwm_device;
 extern struct platform_device jz4740_dma_device;
 
-void jz4740_serial_device_register(void);
-
 #endif

arch/mips/jz4740/Makefile

@@ -5,7 +5,7 @@
 # Object file lists.
 
 obj-y += prom.o time.o reset.o setup.o \
-	platform.o timer.o serial.o
+	platform.o timer.o
 
 obj-$(CONFIG_MACH_JZ4740) += gpio.o
 

arch/mips/jz4740/board-qi_lb60.c

@@ -473,8 +473,6 @@ static int __init qi_lb60_init_platform_devices(void)
 
 	gpiod_add_lookup_table(&qi_lb60_audio_gpio_table);
 
-	jz4740_serial_device_register();
-
 	spi_register_board_info(qi_lb60_spi_board_info,
 				ARRAY_SIZE(qi_lb60_spi_board_info));
 

arch/mips/jz4740/platform.c

@@ -30,7 +30,6 @@
 #include <linux/serial_core.h>
 #include <linux/serial_8250.h>
 
-#include "serial.h"
 #include "clock.h"
 
 /* OHCI controller */
@@ -280,50 +279,6 @@ struct platform_device jz4740_adc_device = {
 	.resource	= jz4740_adc_resources,
 };
 
-/* Serial */
-#define JZ4740_UART_DATA(_id) \
-	{ \
-		.flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE, \
-		.iotype = UPIO_MEM, \
-		.regshift = 2, \
-		.serial_out = jz4740_serial_out, \
-		.type = PORT_16550, \
-		.mapbase = JZ4740_UART ## _id ## _BASE_ADDR, \
-		.irq = JZ4740_IRQ_UART ## _id, \
-	}
-
-static struct plat_serial8250_port jz4740_uart_data[] = {
-	JZ4740_UART_DATA(0),
-	JZ4740_UART_DATA(1),
-	{},
-};
-
-static struct platform_device jz4740_uart_device = {
-	.name = "serial8250",
-	.id = 0,
-	.dev = {
-		.platform_data = jz4740_uart_data,
-	},
-};
-
-void jz4740_serial_device_register(void)
-{
-	struct plat_serial8250_port *p;
-	struct clk *ext_clk;
-	unsigned long ext_rate;
-
-	ext_clk = clk_get(NULL, "ext");
-	if (IS_ERR(ext_clk))
-		panic("unable to get ext clock");
-	ext_rate = clk_get_rate(ext_clk);
-	clk_put(ext_clk);
-
-	for (p = jz4740_uart_data; p->flags != 0; ++p)
-		p->uartclk = ext_rate;
-
-	platform_device_register(&jz4740_uart_device);
-}
-
 /* Watchdog */
 static struct resource jz4740_wdt_resources[] = {
 	{

arch/mips/jz4740/prom.c

@@ -59,16 +59,3 @@ void __init prom_init(void)
 void __init prom_free_prom_memory(void)
 {
 }
-
-#define UART_REG(_reg) ((void __iomem *)CKSEG1ADDR(JZ4740_UART0_BASE_ADDR + (_reg << 2)))
-
-void prom_putchar(char c)
-{
-	uint8_t lsr;
-
-	do {
-		lsr = readb(UART_REG(UART_LSR));
-	} while ((lsr & UART_LSR_TEMT) == 0);
-
-	writeb(c, UART_REG(UART_TX));
-}