snes: lorom: complete BusAddressToPak implementation

snes/mapping/lorom/mapping.go

@@ -16,15 +16,50 @@ func BusAddressToPC(busAddr uint32) uint32 {
 }
 
 func BusAddressToPak(busAddr uint32) uint32 {
-	if busAddr >= 0x700000 && busAddr < 0x7E0000 {
-		sram := (busAddr - 0x700000) + 0xE00000
-		return sram
+	if busAddr >= 0xF00000 && busAddr < 0x1_000000 {
+		if busAddr&0x8000 != 0 {
+			// ROM access:         $F0:8000-$F0:FFFF
+			rom := util.BankToLinear(busAddr&0x3F7FFF) + 0x000000
+			return rom
+		} else {
+			// SRAM access:        $F0:0000-$FF:7FFF
+			sram := util.BankToLinear(busAddr-0xF00000) + 0xE00000
+			return sram
+		}
+	} else if busAddr >= 0x800000 && busAddr < 0xF00000 {
+		if busAddr&0x8000 != 0 {
+			// ROM access:         $80:8000-$80:FFFF
+			rom := util.BankToLinear(busAddr&0x3F7FFF) + 0x000000
+			return rom
+		} else if busAddr&0x1FFF != 0 {
+			// Lower 8KiB of WRAM: $80:0000-$F0:1FFF
+			wram := (busAddr & 0x1FFF) + 0xF50000
+			return wram
+		}
 	} else if busAddr >= 0x7E0000 && busAddr < 0x800000 {
+		// WRAM access:
 		wram := (busAddr - 0x7E0000) + 0xF50000
 		return wram
-	} else if busAddr&0x8000 != 0 {
-		sram := util.BankToLinear(busAddr&0x3FFFFF) + 0x000000
-		return sram
+	} else if busAddr >= 0x700000 && busAddr < 0x7E0000 {
+		if busAddr&0x8000 != 0 {
+			// ROM access:         $70:8000-$7D:FFFF
+			rom := util.BankToLinear(busAddr&0x3F7FFF) + 0x000000
+			return rom
+		} else {
+			// SRAM access:        $70:0000-$7D:7FFF
+			sram := util.BankToLinear(busAddr-0x700000) + 0xE00000
+			return sram
+		}
+	} else if busAddr < 0x700000 {
+		if busAddr&0x8000 != 0 {
+			// ROM access:         $00:8000-$6F:FFFF
+			rom := util.BankToLinear(busAddr&0x3F7FFF) + 0x000000
+			return rom
+		} else if busAddr&0x1FFF != 0 {
+			// Lower 8KiB of WRAM: $00:0000-$6F:1FFF
+			wram := (busAddr & 0x1FFF) + 0xF50000
+			return wram
+		}
 	}
 	return busAddr
 }

snes/mapping/lorom/mapping_test.go

@@ -258,3 +258,179 @@ func TestPakAddressToBus(t *testing.T) {
 		})
 	}
 }
+
+func TestBusAddressToPak(t *testing.T) {
+	type args struct {
+		busAddr uint32
+	}
+	tests := []struct {
+		name string
+		args args
+		want uint32
+	}{
+		// ROM header shadows:
+		{
+			name: "ROM header bank $00",
+			args: args{
+				busAddr: 0x00FFC0,
+			},
+			want: 0x007FC0,
+		},
+		{
+			name: "ROM header bank $40",
+			args: args{
+				busAddr: 0x40FFC0,
+			},
+			want: 0x007FC0,
+		},
+		{
+			name: "ROM header bank $80",
+			args: args{
+				busAddr: 0x80FFC0,
+			},
+			want: 0x007FC0,
+		},
+		{
+			name: "ROM header bank $C0",
+			args: args{
+				busAddr: 0xC0FFC0,
+			},
+			want: 0x007FC0,
+		},
+		// WRAM:
+		{
+			name: "WRAM $00000",
+			args: args{
+				busAddr: 0x7E0000,
+			},
+			want: 0xF50000,
+		},
+		{
+			name: "WRAM $01000",
+			args: args{
+				busAddr: 0x7E1000,
+			},
+			want: 0xF51000,
+		},
+		{
+			name: "WRAM $02000",
+			args: args{
+				busAddr: 0x7E2000,
+			},
+			want: 0xF52000,
+		},
+		{
+			name: "WRAM $0FFFF",
+			args: args{
+				busAddr: 0x7EFFFF,
+			},
+			want: 0xF5FFFF,
+		},
+		{
+			name: "WRAM $10000",
+			args: args{
+				busAddr: 0x7F0000,
+			},
+			want: 0xF60000,
+		},
+		{
+			name: "WRAM $1FFFF",
+			args: args{
+				busAddr: 0x7FFFFF,
+			},
+			want: 0xF6FFFF,
+		},
+		// SRAM:
+		{
+			name: "SRAM $F0 bank",
+			args: args{
+				busAddr: 0xF00000,
+			},
+			want: 0xE00000,
+		},
+		{
+			name: "SRAM $F0 bank last byte",
+			args: args{
+				busAddr: 0xF07FFF,
+			},
+			want: 0xE07FFF,
+		},
+		{
+			name: "SRAM $F1 bank first byte",
+			args: args{
+				busAddr: 0xF10000,
+			},
+			want: 0xE08000,
+		},
+		{
+			name: "SRAM $FD bank first byte",
+			args: args{
+				busAddr: 0xFD0000,
+			},
+			want: 0xE68000,
+		},
+		{
+			name: "SRAM $FD bank last byte",
+			args: args{
+				busAddr: 0xFD7FFF,
+			},
+			want: 0xE6FFFF,
+		},
+		{
+			name: "SRAM $FE bank",
+			args: args{
+				busAddr: 0xFE0000,
+			},
+			want: 0xE70000,
+		},
+		{
+			name: "SRAM $FF bank",
+			args: args{
+				busAddr: 0xFF0000,
+			},
+			want: 0xE78000,
+		},
+		{
+			name: "SRAM $70 bank",
+			args: args{
+				busAddr: 0x700000,
+			},
+			want: 0xE00000,
+		},
+		{
+			name: "SRAM $70 bank last byte",
+			args: args{
+				busAddr: 0x707FFF,
+			},
+			want: 0xE07FFF,
+		},
+		{
+			name: "SRAM $71 bank first byte",
+			args: args{
+				busAddr: 0x710000,
+			},
+			want: 0xE08000,
+		},
+		{
+			name: "SRAM $7D bank first byte",
+			args: args{
+				busAddr: 0x7D0000,
+			},
+			want: 0xE68000,
+		},
+		{
+			name: "SRAM $7D bank last byte",
+			args: args{
+				busAddr: 0x7D7FFF,
+			},
+			want: 0xE6FFFF,
+		},
+	}
+	for _, tt := range tests {
+		t.Run(tt.name, func(t *testing.T) {
+			if got := BusAddressToPak(tt.args.busAddr); got != tt.want {
+				t.Errorf("BusAddressToPak() = %v, want %v", got, tt.want)
+			}
+		})
+	}
+}

snes/util/mapping_test.go

@@ -0,0 +1,78 @@
+package util
+
+import "testing"
+
+func TestBankToLinear(t *testing.T) {
+	type args struct {
+		addr uint32
+	}
+	tests := []struct {
+		name string
+		args args
+		want uint32
+	}{
+		{
+			name: "Bank 00, Offset 0000",
+			args: args{
+				addr: 0x000000,
+			},
+			want: 0x000000,
+		},
+		{
+			name: "Bank 00, Offset 8000",
+			args: args{
+				addr: 0x008000,
+			},
+			want: 0x000000,
+		},
+		{
+			name: "Bank 00, Offset 7FFF",
+			args: args{
+				addr: 0x007FFF,
+			},
+			want: 0x007FFF,
+		},
+		{
+			name: "Bank 00, Offset FFFF",
+			args: args{
+				addr: 0x00FFFF,
+			},
+			want: 0x007FFF,
+		},
+		{
+			name: "Bank 01, Offset 0000",
+			args: args{
+				addr: 0x010000,
+			},
+			want: 0x008000,
+		},
+		{
+			name: "Bank 01, Offset 8000",
+			args: args{
+				addr: 0x018000,
+			},
+			want: 0x008000,
+		},
+		{
+			name: "Bank 01, Offset 7FFF",
+			args: args{
+				addr: 0x017FFF,
+			},
+			want: 0x00FFFF,
+		},
+		{
+			name: "Bank 01, Offset FFFF",
+			args: args{
+				addr: 0x01FFFF,
+			},
+			want: 0x00FFFF,
+		},
+	}
+	for _, tt := range tests {
+		t.Run(tt.name, func(t *testing.T) {
+			if got := BankToLinear(tt.args.addr); got != tt.want {
+				t.Errorf("BankToLinear() = %v, want %v", got, tt.want)
+			}
+		})
+	}
+}