snes: lorom: 100% coverage

alttpo · Jun 20, 2021 · d34a7e1 · d34a7e1
1 parent b148c48
commit d34a7e1
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Showing 2 changed files with 90 additions and 13 deletions.
diff --git a/snes/mapping/lorom/mapping.go b/snes/mapping/lorom/mapping.go
@@ -4,17 +4,6 @@ import (
 	"sni/snes/mapping/util"
 )
 
-func BusAddressToPC(busAddr uint32) uint32 {
-	page := busAddr & 0xFFFF
-	if page < 0x8000 {
-		return 0x1000000
-	}
-
-	bank := busAddr >> 16
-	pcAddr := (bank << 15) | (page - 0x8000)
-	return pcAddr
-}
-
 func BusAddressToPak(busAddr uint32) uint32 {
 	if busAddr >= 0xF00000 && busAddr < 0x1_000000 {
 		if busAddr&0x8000 != 0 {
@@ -28,11 +17,11 @@ func BusAddressToPak(busAddr uint32) uint32 {
 		}
 	} else if busAddr >= 0x800000 && busAddr < 0xF00000 {
 		if busAddr&0x8000 != 0 {
-			// ROM access:         $80:8000-$80:FFFF
+			// ROM access:         $80:8000-$EF:FFFF
 			rom := util.BankToLinear(busAddr&0x3F7FFF) + 0x000000
 			return rom
 		} else if busAddr&0xFFFF < 0x2000 {
-			// Lower 8KiB of WRAM: $80:0000-$F0:1FFF
+			// Lower 8KiB of WRAM: $80:0000-$EF:1FFF
 			wram := (busAddr & 0x1FFF) + 0xF50000
 			return wram
 		}

diff --git a/snes/mapping/lorom/mapping_test.go b/snes/mapping/lorom/mapping_test.go
@@ -340,6 +340,35 @@ func TestBusAddressToPak(t *testing.T) {
 			},
 			want: 0xF6FFFF,
 		},
+		// banks F0-FF:
+		{
+			name: "ROM $F0 bank",
+			args: args{
+				busAddr: 0xF08000,
+			},
+			want: 0x180000,
+		},
+		{
+			name: "ROM $F0 bank last byte",
+			args: args{
+				busAddr: 0xF0FFFF,
+			},
+			want: 0x187FFF,
+		},
+		{
+			name: "ROM $FF bank",
+			args: args{
+				busAddr: 0xFF8000,
+			},
+			want: 0x1F8000,
+		},
+		{
+			name: "ROM $FF bank last byte",
+			args: args{
+				busAddr: 0xFFFFFF,
+			},
+			want: 0x1FFFFF,
+		},
 		// SRAM:
 		{
 			name: "SRAM $F0 bank",
@@ -390,6 +419,50 @@ func TestBusAddressToPak(t *testing.T) {
 			},
 			want: 0xE78000,
 		},
+		// WRAM:
+		{
+			name: "WRAM $80 bank $0000",
+			args: args{
+				busAddr: 0x800000,
+			},
+			want: 0xF50000,
+		},
+		{
+			name: "WRAM $80 bank $1000",
+			args: args{
+				busAddr: 0x801000,
+			},
+			want: 0xF51000,
+		},
+		// banks 70-7D:
+		{
+			name: "ROM $70 bank",
+			args: args{
+				busAddr: 0x708000,
+			},
+			want: 0x180000,
+		},
+		{
+			name: "ROM $70 bank last byte",
+			args: args{
+				busAddr: 0x70FFFF,
+			},
+			want: 0x187FFF,
+		},
+		{
+			name: "ROM $7D bank",
+			args: args{
+				busAddr: 0x7D8000,
+			},
+			want: 0x1E8000,
+		},
+		{
+			name: "ROM $7D bank last byte",
+			args: args{
+				busAddr: 0x7DFFFF,
+			},
+			want: 0x1EFFFF,
+		},
 		{
 			name: "SRAM $70 bank",
 			args: args{
@@ -425,6 +498,21 @@ func TestBusAddressToPak(t *testing.T) {
 			},
 			want: 0xE6FFFF,
 		},
+		// WRAM:
+		{
+			name: "WRAM $00 bank $0000",
+			args: args{
+				busAddr: 0x000000,
+			},
+			want: 0xF50000,
+		},
+		{
+			name: "WRAM $00 bank $1000",
+			args: args{
+				busAddr: 0x001000,
+			},
+			want: 0xF51000,
+		},
 	}
 	for _, tt := range tests {
 		t.Run(tt.name, func(t *testing.T) {