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snes: hirom: add missing LowRAM WRAM mappings
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JamesDunne committed Jun 20, 2021
1 parent 1513ec2 commit ecca4c1
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Showing 2 changed files with 79 additions and 14 deletions.
36 changes: 22 additions & 14 deletions snes/mapping/hirom/mapping.go
Original file line number Diff line number Diff line change
Expand Up @@ -19,10 +19,15 @@ func BusAddressToPak(busAddr uint32) uint32 {
rom := util.BankToLinear(busAddr&0x3F7FFF) + 0x000000
return rom
} else if busAddr&0x7FFF >= 0x6000 {
// TODO: A0-AF, B0-BF mirroring?
// SRAM access: $A0:6000-$BF:7FFF
bank := (busAddr >> 16) - 0xA0
sram := ((bank << 13) + (busAddr & 0x1FFF)) + 0xE00000
return sram
} else if busAddr&0xFFFF < 0x2000 {
// Lower 8KiB of WRAM: $A0:0000-$BF:1FFF
wram := (busAddr & 0x1FFF) + 0xF50000
return wram
}
} else if busAddr >= 0x800000 && busAddr < 0xA00000 {
if busAddr&0x8000 != 0 {
Expand All @@ -48,10 +53,15 @@ func BusAddressToPak(busAddr uint32) uint32 {
rom := util.BankToLinear(busAddr&0x3F7FFF) + 0x000000
return rom
} else if busAddr&0x7FFF >= 0x6000 {
// TODO: 20-2F, 30-3F mirroring?
// SRAM access: $20:6000-$3F:7FFF
bank := (busAddr >> 16) - 0x20
sram := ((bank << 13) + (busAddr & 0x1FFF)) + 0xE00000
return sram
} else if busAddr&0xFFFF < 0x2000 {
// Lower 8KiB of WRAM: $00:0000-$1F:1FFF
wram := (busAddr & 0x1FFF) + 0xF50000
return wram
}
} else if busAddr >= 0x000000 && busAddr < 0x200000 {
if busAddr&0x8000 != 0 {
Expand All @@ -74,33 +84,31 @@ func PakAddressToBus(pakAddr uint32) uint32 {
// are not available on the SNES bus; they are copies of otherwise inaccessible memory
// like VRAM, CGRAM, OAM, etc.:
return ((pakAddr - 0xF50000) & 0x01FFFF) + 0x7E0000
}
// SRAM is a little more complex, but not much:
if pakAddr >= 0xE00000 && pakAddr < 0xF00000 {
} else if pakAddr >= 0xE00000 && pakAddr < 0xF00000 {
// SRAM is a little more complex, but not much:
// bank $A0-$BF
busAddr := pakAddr - 0xE00000
offs := busAddr & 0x1FFF
bank := (busAddr >> 13) & 0x1F
busAddr = ((0xA0 + bank) << 16) + (offs + 0x6000)
return busAddr
}
// ROM access:
// HiROM is limited to $40 full banks
if pakAddr < 0x200000 {
} else if pakAddr >= 0x200000 && pakAddr < 0xE00000 {
busAddr := pakAddr & 0x3FFFFF
// Accessing memory in banks $80-$FF is done at 3.58 MHz (120 ns) if the value at address $420D (hardware register) is set to 1.
// Starting at $C0 gets us the full linear mapping of ROM without having to cut up in $8000 sized chunks:
busAddr = 0xC00000 + busAddr
return busAddr
} else if pakAddr < 0x200000 {
// ROM access:
// HiROM is limited to $40 full banks

// use SlowROM banks $00-$3F:
busAddr := pakAddr & 0x3FFFFF
offs := busAddr & 0x7FFF
bank := busAddr >> 15
busAddr = ((0x00 + bank) << 16) + (offs | 0x8000)
return busAddr
}
if pakAddr < 0xE00000 {
busAddr := pakAddr & 0x3FFFFF
// Accessing memory in banks $80-$FF is done at 3.58 MHz (120 ns) if the value at address $420D (hardware register) is set to 1.
// Starting at $C0 gets us the full linear mapping of ROM without having to cut up in $8000 sized chunks:
busAddr = 0xC00000 + busAddr
return busAddr
}
// /shrug
return pakAddr
}
57 changes: 57 additions & 0 deletions snes/mapping/hirom/mapping_test.go
Original file line number Diff line number Diff line change
Expand Up @@ -475,6 +475,34 @@ func TestBusAddressToPak(t *testing.T) {
},
want: 0xF51FFF,
},
{
name: "WRAM bank $A0:0000",
args: args{
busAddr: 0xA00000,
},
want: 0xF50000,
},
{
name: "WRAM bank $A0:1FFF",
args: args{
busAddr: 0xA01FFF,
},
want: 0xF51FFF,
},
{
name: "WRAM bank $BF:0000",
args: args{
busAddr: 0xBF0000,
},
want: 0xF50000,
},
{
name: "WRAM bank $BF:1FFF",
args: args{
busAddr: 0xBF1FFF,
},
want: 0xF51FFF,
},
// WRAM banks 7E-7F:
{
name: "WRAM bank $7E:0000",
Expand Down Expand Up @@ -596,6 +624,7 @@ func TestBusAddressToPak(t *testing.T) {
},
want: 0xE3FFFF,
},
// WRAM:
{
name: "WRAM bank $00:0000",
args: args{
Expand Down Expand Up @@ -624,6 +653,34 @@ func TestBusAddressToPak(t *testing.T) {
},
want: 0xF51FFF,
},
{
name: "WRAM bank $20:0000",
args: args{
busAddr: 0x200000,
},
want: 0xF50000,
},
{
name: "WRAM bank $20:1FFF",
args: args{
busAddr: 0x201FFF,
},
want: 0xF51FFF,
},
{
name: "WRAM bank $3F:0000",
args: args{
busAddr: 0x3F0000,
},
want: 0xF50000,
},
{
name: "WRAM bank $3F:1FFF",
args: args{
busAddr: 0x3F1FFF,
},
want: 0xF51FFF,
},
}
for _, tt := range tests {
t.Run(tt.name, func(t *testing.T) {
Expand Down

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