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ARROW-3844: [C++] Remove ARROW_USE_SSE and ARROW_SSE3 #3037
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Note it is debatable whether some functions (such as CRC32 accelerations) are actually "SIMD". Someone may suggest another name if desired. |
Ah, there is a crash that is due to |
Rather than try to workaround the null pointer issue, I will wait for PR #3036 to be merged and then rebase this PR, since that will change the uses of hash functions by Parquet. |
I think that |
Well, the aim is really to provide a knob to disable all explicit use of optional instructions / intrinsics etc. in the source code. Currently |
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Rebased now. |
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+1
Rebasing again. Not sure what's broken about double-conversion in conda-forge today |
Those options can be detected programmatically (SSE3 and SSE4.2 are available on all recent x86-64 CPUs). Instead we add a ARROW_USE_SIMD option that can be disabled to exercise non-SIMD fallback paths.
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Codecov Report
@@ Coverage Diff @@
## master #3037 +/- ##
=========================================
+ Coverage 86.95% 88.06% +1.1%
=========================================
Files 483 425 -58
Lines 68606 64888 -3718
=========================================
- Hits 59658 57144 -2514
+ Misses 8851 7744 -1107
+ Partials 97 0 -97
Continue to review full report at Codecov.
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Those options can be detected programmatically (SSE3 and SSE4.2 are available on all recent x86-64 CPUs).
Instead we add a ARROW_USE_SIMD option that can be disabled to exercise non-SIMD fallback paths.