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esp32[c3|c6|h2]: Add SPI bitbang support
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eren-terzioglu committed Nov 1, 2024
1 parent b271507 commit 13c4c7a
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Showing 17 changed files with 855 additions and 27 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -244,6 +244,10 @@ This configuration enables the support for the SPI driver.
You can test it by connecting MOSI and MISO pins which are GPIO7 and GPIO2
by default to each other and running the ``spi`` example::

If SPI peripherals are already in use you can also use bitbang driver which is a
software implemented SPI peripheral by enabling `CONFIG_ESPRESSIF_SPI_BITBANG`
option.

nsh> spi exch -b 2 "AB"
Sending: AB
Received: AB
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Original file line number Diff line number Diff line change
Expand Up @@ -256,6 +256,10 @@ This configuration enables the support for the SPI driver.
You can test it by connecting MOSI and MISO pins which are GPIO7 and GPIO2
by default to each other and running the ``spi`` example::

If SPI peripherals are already in use you can also use bitbang driver which is a
software implemented SPI peripheral by enabling `CONFIG_ESPRESSIF_SPI_BITBANG`
option.

nsh> spi exch -b 2 "AB"
Sending: AB
Received: AB
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Original file line number Diff line number Diff line change
Expand Up @@ -218,6 +218,10 @@ This configuration enables the support for the SPI driver.
You can test it by connecting MOSI and MISO pins which are GPIO7 and GPIO2
by default to each other and running the ``spi`` example::

If SPI peripherals are already in use you can also use bitbang driver which is a
software implemented SPI peripheral by enabling `CONFIG_ESPRESSIF_SPI_BITBANG`
option.

nsh> spi exch -b 2 "AB"
Sending: AB
Received: AB
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Original file line number Diff line number Diff line change
Expand Up @@ -217,6 +217,10 @@ This configuration enables the support for the SPI driver.
You can test it by connecting MOSI and MISO pins which are GPIO5 and GPIO0
by default to each other and running the ``spi`` example::

If SPI peripherals are already in use you can also use bitbang driver which is a
software implemented SPI peripheral by enabling `CONFIG_ESPRESSIF_SPI_BITBANG`
option.

nsh> spi exch -b 2 "AB"
Sending: AB
Received: AB
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60 changes: 60 additions & 0 deletions arch/risc-v/src/common/espressif/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -337,11 +337,26 @@ config ESPRESSIF_SPI
bool
default n

config ESPRESSIF_SPI_PERIPH
bool
depends on ESPRESSIF_SPI2
default n

config ESPRESSIF_SPI2
bool "SPI 2"
default n
select ESPRESSIF_SPI
select SPI
select ESPRESSIF_SPI_PERIPH

config ESPRESSIF_SPI_BITBANG
bool "SPI Bitbang"
default n
select ESPRESSIF_SPI
select SPI
select SPI_BITBANG
---help---
Software implemented SPI peripheral with GPIOs. Suggested to use if SPI peripheral is already in use.

config ESPRESSIF_SPIFLASH
bool "SPI Flash"
Expand Down Expand Up @@ -1150,6 +1165,7 @@ menu "SPI configuration"

config ESPRESSIF_SPI_SWCS
bool "SPI software CS"
depends on ESPRESSIF_SPI_PERIPH
default n
---help---
Use SPI software CS.
Expand All @@ -1158,6 +1174,7 @@ config ESPRESSIF_SPI_UDCS
bool "User defined CS"
default n
depends on ESPRESSIF_SPI_SWCS
depends on ESPRESSIF_SPI_PERIPH
---help---
Use user-defined CS.

Expand Down Expand Up @@ -1228,10 +1245,53 @@ config ESPRESSIF_SPI2_MISOPIN

endif # ESPRESSIF_SPI2

if ESPRESSIF_SPI_BITBANG

config ESPRESSIF_SPI_BITBANG_CSPIN
int "SPI Bitbang CS Pin"
default 0
range 0 21

config ESPRESSIF_SPI_BITBANG_CLKPIN
int "SPI Bitbang CLK Pin"
default 1
range 0 21

config ESPRESSIF_SPI_BITBANG_MOSIPIN
int "SPI Bitbang MOSI Pin"
default 2
range 0 21

config ESPRESSIF_SPI_BITBANG_MISOPIN
int "SPI Bitbang MISO Pin"
default 3
range 0 21

choice ESPRESSIF_SPI_BITBANG_MODE
prompt "SPI Bitbang mode"
default ESPRESSIF_SPI_BITBANG_MODE0

config ESPRESSIF_SPI_BITBANG_MODE0
bool "SPI MODE0"

config ESPRESSIF_SPI_BITBANG_MODE1
bool "SPI MODE1"

config ESPRESSIF_SPI_BITBANG_MODE2
bool "SPI MODE2"

config ESPRESSIF_SPI_BITBANG_MODE3
bool "SPI MODE3"

endchoice # ESPRESSIF_SPI_BITBANG_MODE

endif # ESPRESSIF_SPI_BITBANG

config ESPRESSIF_SPI_TEST_MODE
bool "SPI driver loopback test mode (for testing only)"
default n
depends on SYSTEM_SPITOOL
depends on ESPRESSIF_SPI_PERIPH
---help---
This enables a loopback test mode that attaches the transmitter
to the receiver internally, being able to test the SPI
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7 changes: 6 additions & 1 deletion arch/risc-v/src/common/espressif/Make.defs
Original file line number Diff line number Diff line change
Expand Up @@ -103,10 +103,15 @@ ifeq ($(CONFIG_ESPRESSIF_I2C),y)
endif

ifeq ($(CONFIG_ESPRESSIF_SPI),y)
CHIP_CSRCS += esp_spi.c
ifeq ($(CONFIG_ESPRESSIF_SPI_PERIPH),y)
CHIP_CSRCS += esp_spi.c
endif
ifeq ($(CONFIG_SPI_SLAVE),y)
CHIP_CSRCS += esp_spi_slave.c
endif
ifeq ($(CONFIG_ESPRESSIF_SPI_BITBANG),y)
CHIP_CSRCS += esp_spi_bitbang.c
endif
endif

ifeq ($(CONFIG_ESPRESSIF_SPIFLASH),y)
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4 changes: 2 additions & 2 deletions arch/risc-v/src/common/espressif/esp_spi.c
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@

#include <nuttx/config.h>

#ifdef CONFIG_ESPRESSIF_SPI
#ifdef CONFIG_ESPRESSIF_SPI_PERIPH

#include <assert.h>
#include <debug.h>
Expand Down Expand Up @@ -1283,4 +1283,4 @@ int esp_spibus_uninitialize(struct spi_dev_s *dev)
return OK;
}

#endif /* CONFIG_ESPRESSIF_SPI */
#endif /* CONFIG_ESPRESSIF_SPI_PERIPH */
8 changes: 3 additions & 5 deletions arch/risc-v/src/common/espressif/esp_spi.h
Original file line number Diff line number Diff line change
Expand Up @@ -42,13 +42,11 @@ extern "C"
#define EXTERN extern
#endif

#ifdef CONFIG_ESPRESSIF_SPI
#ifdef CONFIG_ESPRESSIF_SPI_PERIPH

#include <nuttx/spi/spi.h>

#ifdef CONFIG_ESPRESSIF_SPI2
# define ESPRESSIF_SPI2 2
#endif
#define ESPRESSIF_SPI2 2

/****************************************************************************
* Public Function Prototypes
Expand Down Expand Up @@ -159,7 +157,7 @@ struct spi_slave_ctrlr_s *esp_spislave_ctrlr_initialize(int port);

int esp_spislave_ctrlr_uninitialize(struct spi_slave_ctrlr_s *ctrlr);

#endif /* CONFIG_ESPRESSIF_SPI */
#endif /* CONFIG_ESPRESSIF_SPI_PERIPH */

#ifdef __cplusplus
}
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