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Fix Infinite Loop in arm_dcache.c #14490
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Infinite Loop can happen since `ways` is assigned to an `int32_t tmpways`. This can cause infinite loop if `ways` gets a sufficiently large integer.
arch/arm/src/armv7-m/arm_cache.c
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@@ -529,7 +529,7 @@ void up_enable_dcache(void) | |||
ARM_DSB(); | |||
do | |||
{ | |||
int32_t tmpways = ways; | |||
uint32_t tmpways = ways; |
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but no real difference I think?
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Atleast it wont be a negetive number anymore right? However I agree that it will still take a very long time to finish
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do you really get a negative number from real device? This register is read only and officially defined by arm:
https://developer.arm.com/documentation/ddi0595/2021-03/AArch32-Registers/CCSIDR--Current-Cache-Size-ID-Register.
CCSIDR_WAYS(ccsidr)
expends to (ccsider >> 3) & 0x3ff
, it is impossible to become a negative number.
@PwnVerse please fix the build error, but reconsider your assumption:
You should trust the value specified by ARM spec, so it's impossible to get a invalid value at all. |
Infinite Loop can happen since
ways
is assigned to anint32_t tmpways
. This can cause infinite loop ifways
gets a sufficiently large integer.