Remove Select

apache · Jul 8, 2019 · 3d88c70 · 3d88c70
1 parent f6cd4dd
commit 3d88c70
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Showing 3 changed files with 5 additions and 64 deletions.
diff --git a/include/tvm/runtime/vm.h b/include/tvm/runtime/vm.h
@@ -61,12 +61,11 @@ enum class Opcode {
   AllocClosure = 8U,
   GetField = 9U,
   If = 10U,
-  Selecti = 11U,
-  LoadConst = 12U,
-  Goto = 13U,
-  GetTag = 14U,
-  LoadConsti = 15U,
-  Fatal = 16U,
+  LoadConst = 11U,
+  Goto = 12U,
+  GetTag = 13U,
+  LoadConsti = 14U,
+  Fatal = 15U,
 };
 
 /*! \brief A single virtual machine instruction.
@@ -130,16 +129,6 @@ struct Instruction {
       /*! \brief The arguments to pass to the packed function. */
       RegName* packed_args;
     };
-    struct /* Select Operands */ {
-      /*! \brief The test value of select. */
-      RegName test;
-      /*! \brief The target value of select. */
-      RegName target;
-      /*! \brief The true branch. */
-      RegName op1;
-      /*! \brief The false branch. */
-      RegName op2;
-    } selecti;
     struct /* If Operands */ {
       /*! \brief The register containing the test value. */
       RegName test;
@@ -198,15 +187,6 @@ struct Instruction {
     };
   };
 
-  /*! \brief Construct a select instruction.
-   *  \param test The test register.
-   *  \param target The target register.
-   *  \param op1 The true register.
-   *  \param op2 The false register.
-   *  \param dst The destination register.
-   *  \return The select instruction.
-   */
-  static Instruction Selecti(RegName test, RegName target, RegName op1, RegName op2, RegName dst);
   /*! \brief Construct a return instruction.
    *  \param return_reg The register containing the return value.
    *  \return The return instruction.

diff --git a/src/relay/backend/vm/compiler.cc b/src/relay/backend/vm/compiler.cc
@@ -206,7 +206,6 @@ struct VMCompiler : ExprFunctor<void(const Expr& expr)> {
       case Opcode::GetTag:
       case Opcode::LoadConst:
       case Opcode::LoadConsti:
-      case Opcode::Selecti:
       case Opcode::Invoke:
       case Opcode::AllocClosure:
       case Opcode::Move:

diff --git a/src/runtime/vm/vm.cc b/src/runtime/vm/vm.cc
@@ -60,9 +60,6 @@ Instruction::Instruction(const Instruction& instr) {
       return;
     case Opcode::Fatal:
       return;
-    case Opcode::Selecti:
-      this->selecti = instr.selecti;
-      return;
     case Opcode::Ret:
       this->result = instr.result;
       return;
@@ -148,9 +145,6 @@ Instruction& Instruction::operator=(const Instruction& instr) {
     case Opcode::LoadConsti:
       this->load_consti = instr.load_consti;
       return *this;
-    case Opcode::Selecti:
-      this->selecti = instr.selecti;
-      return *this;
     case Opcode::Ret:
       this->result = instr.result;
       return *this;
@@ -221,7 +215,6 @@ Instruction& Instruction::operator=(const Instruction& instr) {
 Instruction::~Instruction() {
   switch (this->op) {
     case Opcode::Move:
-    case Opcode::Selecti:
     case Opcode::Ret:
     case Opcode::AllocTensorReg:
     case Opcode::If:
@@ -360,18 +353,6 @@ Instruction Instruction::If(RegName test, RegName target, Index true_branch, Ind
   return instr;
 }
 
-Instruction Instruction::Selecti(RegName test, RegName target,
-                                 RegName op1, RegName op2, RegName dst) {
-  Instruction instr;
-  instr.op = Opcode::Selecti;
-  instr.dst = dst;
-  instr.selecti.test = test;
-  instr.selecti.target = target;
-  instr.selecti.op1 = op1;
-  instr.selecti.op2 = op2;
-  return instr;
-}
-
 Instruction Instruction::Goto(Index pc_offset) {
   Instruction instr;
   instr.op = Opcode::Goto;
@@ -548,11 +529,6 @@ void InstructionPrint(std::ostream& os, const Instruction& instr) {
       os << "goto " << instr.pc_offset;
       break;
     }
-    case Opcode::Selecti: {
-      os << "selecti $" << instr.dst << " $" << instr.selecti.test << " $" << instr.selecti.target
-         << " $" << instr.selecti.op1 << " $" << instr.selecti.op2;
-      break;
-    }
     default:
       LOG(FATAL) << "should never hit this case" << static_cast<int>(instr.op);
       break;
@@ -846,20 +822,6 @@ void VirtualMachine::Run() {
         pc++;
         goto main_loop;
       }
-      case Opcode::Selecti: {
-        int32_t test_val = LoadScalarInt(instr.selecti.test);
-        int32_t target_val = LoadScalarInt(instr.selecti.target);
-
-        if (test_val == target_val) {
-          auto op1 = ReadRegister(instr.selecti.op1);
-          WriteRegister(instr.dst, op1);
-        } else {
-          auto op2 = ReadRegister(instr.selecti.op2);
-          WriteRegister(instr.dst, op2);
-        }
-        pc++;
-        goto main_loop;
-      }
       case Opcode::Ret: {
         // If we have hit the point from which we started
         // running, we should return to the caller breaking