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Co-authored-by: Junru Shao <junrushao1994@gmail.com> Co-authored-by: Ruihang Lai <lairuihangdongdong@qq.com>
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/* | ||
* Licensed to the Apache Software Foundation (ASF) under one | ||
* or more contributor license agreements. See the NOTICE file | ||
* distributed with this work for additional information | ||
* regarding copyright ownership. The ASF licenses this file | ||
* to you under the Apache License, Version 2.0 (the | ||
* "License"); you may not use this file except in compliance | ||
* with the License. You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, | ||
* software distributed under the License is distributed on an | ||
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY | ||
* KIND, either express or implied. See the License for the | ||
* specific language governing permissions and limitations | ||
* under the License. | ||
*/ | ||
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/*! | ||
* Lower block init stmt into branch stmt | ||
* \file lower_reduction.cc | ||
*/ | ||
#include <tvm/tir/op.h> | ||
#include <tvm/tir/stmt_functor.h> | ||
#include <tvm/tir/transform.h> | ||
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namespace tvm { | ||
namespace tir { | ||
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class InitBlockLower : public StmtMutator { | ||
private: | ||
Stmt VisitStmt_(const BlockNode* block) final { | ||
if (!block->init.defined()) { | ||
return StmtMutator::VisitStmt_(block); | ||
} | ||
Stmt init = RealizeInitBlock(block->init.value(), block->iter_vars); | ||
Stmt body = VisitStmt(block->body); | ||
auto n = CopyOnWrite(block); | ||
n->init = NullOpt; | ||
n->body = SeqStmt::Flatten(init, body); | ||
return Block(n); | ||
} | ||
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static Stmt RealizeInitBlock(const Stmt& init, const Array<IterVar>& iter_vars) { | ||
std::vector<PrimExpr> conditions; | ||
for (const IterVar& var : iter_vars) { | ||
if (var->iter_type == IterVarType::kCommReduce) { | ||
conditions.push_back(equal(var->var, var->dom->min)); | ||
} | ||
} | ||
// Handle the case where there is no condition | ||
if (conditions.empty()) { | ||
return init; | ||
} | ||
// Concat the conditions with logical and (&&) | ||
PrimExpr cond = conditions[0]; | ||
for (int i = 1; i < conditions.size(); ++i) { | ||
cond = logical_and(cond, conditions[i]); | ||
} | ||
return IfThenElse(cond, init); | ||
} | ||
}; | ||
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PrimFunc LowerInitBlock(PrimFunc func) { | ||
auto fptr = func.CopyOnWrite(); | ||
fptr->body = InitBlockLower()(std::move(fptr->body)); | ||
return func; | ||
} | ||
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namespace transform { | ||
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Pass LowerInitBlock() { | ||
auto pass_func = [](PrimFunc f, IRModule m, PassContext ctx) { | ||
return LowerInitBlock(std::move(f)); | ||
}; | ||
return CreatePrimFuncPass(pass_func, 0, "tir.LowerReduction", {}); | ||
} | ||
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TVM_REGISTER_GLOBAL("tir.transform.LowerInitBlock").set_body_typed(LowerInitBlock); | ||
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} // namespace transform | ||
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} // namespace tir | ||
} // namespace tvm |
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tests/python/unittest/test_tir_transform_lower_init_block.py
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# Licensed to the Apache Software Foundation (ASF) under one | ||
# or more contributor license agreements. See the NOTICE file | ||
# distributed with this work for additional information | ||
# regarding copyright ownership. The ASF licenses this file | ||
# to you under the Apache License, Version 2.0 (the | ||
# "License"); you may not use this file except in compliance | ||
# with the License. You may obtain a copy of the License at | ||
# | ||
# http://www.apache.org/licenses/LICENSE-2.0 | ||
# | ||
# Unless required by applicable law or agreed to in writing, | ||
# software distributed under the License is distributed on an | ||
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY | ||
# KIND, either express or implied. See the License for the | ||
# specific language governing permissions and limitations | ||
# under the License. | ||
import tvm | ||
from tvm import tir | ||
from tvm.script import ty | ||
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@tvm.script.tir | ||
class WithInit: | ||
def main(a: ty.handle, b: ty.handle) -> None: | ||
A = tir.match_buffer(a, [64, 64, 64]) | ||
B = tir.match_buffer(b, [64]) | ||
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with tir.block([64, tir.reduce_axis(0, 64), tir.reduce_axis(32, 64)]) as [i, j, k]: | ||
with tir.init(): | ||
B[i] = tir.float32(0) | ||
B[i] += A[i, j, k] | ||
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@tvm.script.tir | ||
class WithBranch: | ||
def main(a: ty.handle, b: ty.handle) -> None: | ||
A = tir.match_buffer(a, [64, 64, 64]) | ||
B = tir.match_buffer(b, [64]) | ||
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with tir.block([64, tir.reduce_axis(0, 64), tir.reduce_axis(32, 64)]) as [i, j, k]: | ||
if (j == 0) and (k == 32): | ||
B[i] = tir.float32(0) | ||
B[i] += A[i, j, k] | ||
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def test_lower_reduction(): | ||
origin_mod = WithInit() | ||
mod = tvm.tir.transform.LowerInitBlock()(origin_mod) | ||
tvm.ir.assert_structural_equal(mod, WithBranch(), True) | ||
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if __name__ == "__main__": | ||
test_lower_reduction() |